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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [mvme136/] [timer/] [timer.c] - Blame information for rev 30

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/*  Timer_init()
 *
 *  This routine initializes the Z8036 timer on the MVME136 board.
 *
 *  Input parameters:  NONE
 *
 *  Output parameters:  NONE
 *
 *  NOTE: This routine will not work if the optimizer is enabled
 *        for some compilers.  The multiple writes to the Z8036
 *        may be optimized away.
 *
 *        It is important that the timer start/stop overhead be
 *        determined when porting or modifying this code.
 *
 *  COPYRIGHT (c) 1989-1999.
 *  On-Line Applications Research Corporation (OAR).
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id: timer.c,v 1.2 2001-09-27 12:00:14 chris Exp $
 */
 
 
#include <bsp.h>
#include <zilog/z8036.h>
 
#define TIMER 0xfffb0000   /* address of Z8036 on MVME136 */
 
int Ttimer_val;
rtems_boolean Timer_driver_Find_average_overhead;
 
rtems_isr timerisr();
 
void Timer_initialize()
{
  (void) set_vector( timerisr, 66, 0 );       /* install ISR */
 
  Ttimer_val = 0;                             /* clear timer ISR count */
  Z8x36_WRITE( TIMER, MASTER_INTR, 0x01 ); /* reset */
  Z8x36_WRITE( TIMER, MASTER_INTR, 0x00 ); /* clear reset */
  Z8x36_WRITE( TIMER, MASTER_INTR, 0xe2 ); /* disable lower chain, no vec */
                                           /*  set right justified addr */
                                              /*  and master int enable */
  Z8x36_WRITE( TIMER, CT1_MODE_SPEC,  0x80 ); /* T1 continuous, and   */
                                              /* cycle/pulse output   */
 
  *((rtems_unsigned16 *)0xfffb0016) = 0x0000; /* write countdown value */
/*
  Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );
  Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );
*/
  Z8x36_WRITE( TIMER, MASTER_CFG,         0xc4 ); /* enable timer1        */
 
  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,     0xc6 ); /* set INTR enable (IE), */
                                                 /*  trigger command      */
                                                 /*  (TCB) and gate       */
                                                 /* command (GCB) bits    */
  *((rtems_unsigned8 *)0xfffb0038) &= 0xfd;      /* enable timer INTR on  */
                                                 /*    VME controller     */
}
 
#define AVG_OVERHEAD      6  /* It typically takes 3.0 microseconds */
                             /* (6 countdowns) to start/stop the timer. */
#define LEAST_VALID       10 /* Don't trust a value lower than this */
 
int Read_timer()
{
/*
  rtems_unsigned8  msb, lsb;
*/
  rtems_unsigned32 remaining, total;
 
  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,  0xce ); /* read the counter value */
remaining = 0xffff - *((rtems_unsigned16 *) 0xfffb0010);
/*
  Z8x36_READ(  TIMER, CT1_CUR_CNT_MSB, msb );
  Z8x36_READ(  TIMER, CT1_CUR_CNT_LSB, lsb );
 
  remaining = 0xffff - ((msb << 8) + lsb);
*/
  total = (Ttimer_val * 0x10000) + remaining;
 
  if ( Timer_driver_Find_average_overhead == 1 )
    return total;          /* in one-half microsecond units */
 
  else {
    if ( total < LEAST_VALID )
      return 0;            /* below timer resolution */
    return (total-AVG_OVERHEAD) >> 1;
  }
}
 
rtems_status_code Empty_function( void )
{
  return RTEMS_SUCCESSFUL;
}
 
void Set_find_average_overhead(
  rtems_boolean find_flag
)
{
  Timer_driver_Find_average_overhead = find_flag;
}

Line No.	Rev	Author	Line
1	30	unneback	`/* Timer_init()`
2			`*`
3			`* This routine initializes the Z8036 timer on the MVME136 board.`
4			`*`
5			`* Input parameters: NONE`
6			`*`
7			`* Output parameters: NONE`
8			`*`
9			`* NOTE: This routine will not work if the optimizer is enabled`
10			`* for some compilers. The multiple writes to the Z8036`
11			`* may be optimized away.`
12			`*`
13			`* It is important that the timer start/stop overhead be`
14			`* determined when porting or modifying this code.`
15			`*`
16			`* COPYRIGHT (c) 1989-1999.`
17			`* On-Line Applications Research Corporation (OAR).`
18			`*`
19			`* The license and distribution terms for this file may be`
20			`* found in the file LICENSE in this distribution or at`
21			`* http://www.OARcorp.com/rtems/license.html.`
22			`*`
23			`* $Id: timer.c,v 1.2 2001-09-27 12:00:14 chris Exp $`
24			`*/`
25
26
27			`#include <bsp.h>`
28			`#include <zilog/z8036.h>`
29
30			`#define TIMER 0xfffb0000 /* address of Z8036 on MVME136 */`
31
32			`int Ttimer_val;`
33			`rtems_boolean Timer_driver_Find_average_overhead;`
34
35			`rtems_isr timerisr();`
36
37			`void Timer_initialize()`
38			`{`
39			`(void) set_vector( timerisr, 66, 0 ); /* install ISR */`
40
41			`Ttimer_val = 0; /* clear timer ISR count */`
42			`Z8x36_WRITE( TIMER, MASTER_INTR, 0x01 ); /* reset */`
43			`Z8x36_WRITE( TIMER, MASTER_INTR, 0x00 ); /* clear reset */`
44			`Z8x36_WRITE( TIMER, MASTER_INTR, 0xe2 ); /* disable lower chain, no vec */`
45			`/* set right justified addr */`
46			`/* and master int enable */`
47			`Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x80 ); /* T1 continuous, and */`
48			`/* cycle/pulse output */`
49
50			`((rtems_unsigned16 )0xfffb0016) = 0x0000; /* write countdown value */`
51			`/*`
52			`Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );`
53			`Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );`
54			`*/`
55			`Z8x36_WRITE( TIMER, MASTER_CFG, 0xc4 ); /* enable timer1 */`
56
57			`Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xc6 ); /* set INTR enable (IE), */`
58			`/* trigger command */`
59			`/* (TCB) and gate */`
60			`/* command (GCB) bits */`
61			`((rtems_unsigned8 )0xfffb0038) &= 0xfd; /* enable timer INTR on */`
62			`/* VME controller */`
63			`}`
64
65			`#define AVG_OVERHEAD 6 /* It typically takes 3.0 microseconds */`
66			`/* (6 countdowns) to start/stop the timer. */`
67			`#define LEAST_VALID 10 /* Don't trust a value lower than this */`
68
69			`int Read_timer()`
70			`{`
71			`/*`
72			`rtems_unsigned8 msb, lsb;`
73			`*/`
74			`rtems_unsigned32 remaining, total;`
75
76			`Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */`
77			`remaining = 0xffff - ((rtems_unsigned16 ) 0xfffb0010);`
78			`/*`
79			`Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb );`
80			`Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb );`
81
82			`remaining = 0xffff - ((msb << 8) + lsb);`
83			`*/`
84			`total = (Ttimer_val * 0x10000) + remaining;`
85
86			`if ( Timer_driver_Find_average_overhead == 1 )`
87			`return total; /* in one-half microsecond units */`
88
89			`else {`
90			`if ( total < LEAST_VALID )`
91			`return 0; /* below timer resolution */`
92			`return (total-AVG_OVERHEAD) >> 1;`
93			`}`
94			`}`
95
96			`rtems_status_code Empty_function( void )`
97			`{`
98			`return RTEMS_SUCCESSFUL;`
99			`}`
100
101			`void Set_find_average_overhead(`
102			`rtems_boolean find_flag`
103			`)`
104			`{`
105			`Timer_driver_Find_average_overhead = find_flag;`
106			`}`

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [mvme136/] [timer/] [timer.c] - Blame information for rev 30