URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [mvme162/] [timer/] [timerisr.S] - Blame information for rev 173

Details | Compare with Previous | View Log


/*  timer_isr()
 *
 *  This routine provides the ISR for the Z8036 timer on the MVME136
 *  board.   The timer is set up to generate an interrupt at maximum
 *  intervals.
 *
 *  Input parameters:  NONE
 *
 *  Output parameters:  NONE
 *
 *  COPYRIGHT (c) 1989-1999.
 *  On-Line Applications Research Corporation (OAR).
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
 *  EISCAT Scientific Association. M.Savitski
 *
 *  This material is a part of the MVME162 Board Support Package
 *  for the RTEMS executive. Its licensing policies are those of the
 *  RTEMS above.
 *
 *  $Id: timerisr.S,v 1.2 2001-09-27 12:00:18 chris Exp $
 */
 
#include "asm.h"
 
BEGIN_CODE
 
.set INTR_CLEAR_REG,      0xfff40074      | interrupt clear register
.set RELOAD,              0x01000000      | clear tick 1 interrupt
 
        PUBLIC (Ttimer_val)
        PUBLIC (timerisr)
SYM (timerisr):
        move.l  a0, -(a7)                 | save a0
        movea.l #INTR_CLEAR_REG, a0       | a0 = addr of cmd status reg
        ori.l   #RELOAD, (a0)             | reload countdown
        addq.l  #1, SYM (Ttimer_val)      | increment timer value
        move.l  (a7)+, a0                 | restore a0
        rte
 
END_CODE
END

Line No.	Rev	Author	Line
1	30	unneback	`/* timer_isr()`
2			`*`
3			`* This routine provides the ISR for the Z8036 timer on the MVME136`
4			`* board. The timer is set up to generate an interrupt at maximum`
5			`* intervals.`
6			`*`
7			`* Input parameters: NONE`
8			`*`
9			`* Output parameters: NONE`
10			`*`
11			`* COPYRIGHT (c) 1989-1999.`
12			`* On-Line Applications Research Corporation (OAR).`
13			`*`
14			`* The license and distribution terms for this file may be`
15			`* found in the file LICENSE in this distribution or at`
16			`* http://www.OARcorp.com/rtems/license.html.`
17			`*`
18			`* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.`
19			`* EISCAT Scientific Association. M.Savitski`
20			`*`
21			`* This material is a part of the MVME162 Board Support Package`
22			`* for the RTEMS executive. Its licensing policies are those of the`
23			`* RTEMS above.`
24			`*`
25			`* $Id: timerisr.S,v 1.2 2001-09-27 12:00:18 chris Exp $`
26			`*/`
27
28			`#include "asm.h"`
29
30			`BEGIN_CODE`
31
32			`.set INTR_CLEAR_REG, 0xfff40074 \| interrupt clear register`
33			`.set RELOAD, 0x01000000 \| clear tick 1 interrupt`
34
35			`PUBLIC (Ttimer_val)`
36			`PUBLIC (timerisr)`
37			`SYM (timerisr):`
38			`move.l a0, -(a7) \| save a0`
39			`movea.l #INTR_CLEAR_REG, a0 \| a0 = addr of cmd status reg`
40			`ori.l #RELOAD, (a0) \| reload countdown`
41			`addq.l #1, SYM (Ttimer_val) \| increment timer value`
42			`move.l (a7)+, a0 \| restore a0`
43			`rte`
44
45			`END_CODE`
46			`END`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [mvme162/] [timer/] [timerisr.S] - Blame information for rev 173