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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [ods68302/] [include/] [bare.h] - Blame information for rev 493

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1 30 unneback
/*****************************************************************************/
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/*
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  $Id: bare.h,v 1.2 2001-09-27 12:00:21 chris Exp $
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  Card Definition for a bare board.
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  This is an example file which actually builds a BSP for a 68302 card
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  called an MVF (Multi-Voice-Frequency). The card is one of a range
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  which run in a 100Mbit voice/video/data switch used for high end
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  applications such as Air Traffic Control. The transport is
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  FDDI-2. Yes it alive and well and working in real systems.
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  Chip selects are programmed as required. Three are controlled in the
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  boot code. They are RAM, ROM, and peripherals. You can optionally
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  configure the other two chip selects.
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  SYSTEM_CLOCK - You must defined this. It is used for setting the
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  baud rate.
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  CSEL_ROM, CSEL_RAM - Must be defined, and made to be a single number
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  with brackets.
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  ROM_WAIT_STATES, RAM_WAIT_STATES - Must be defined. This sets the
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  speed for the ROM and RAM.
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  ROM and RAM size is passed on the command line. The makefile holds
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  them. This allows a single place to defined it. The makefile allows
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  them to be passed to the linker.
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  CSEL_1, CSEL_2 - If defined the other macros needed to define the
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  chip select must be defined. If not defined they are not programmed
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  and registers are left in the reset state.
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  Card Specific Devices - The MVF card uses a chip select to address a
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  range of peripherials (CSEL_2). These include front panel leds, and
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  4 digit diagnostic display device. Put what ever you need.
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  LED_CONTROL - If defined the boot code will set leds as it goes.
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  UPDATE_DISPLAY - A four digit display device will also be updated to
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  show the boot state.
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  CARD_PA, CARD_PB - The default configuration, data direction and
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  data must be specified.
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  This file allows a range of common parameters which vary from one
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  variant of card to another to placed in a central file.
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*/
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/*****************************************************************************/
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#ifndef _BARE_H_
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#define _BARE_H_
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#if __cplusplus
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extern "C"
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{
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#endif
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/* name of the card */
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#define CARD_ID "m68302-odsbare"
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/* speed of the processor */
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#define SYSTEM_CLOCK (15360000)
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#define SCR_DEFAULT  (RBIT_SCR_IPA | RBIT_SCR_HWT | RBIT_SCR_WPV | RBIT_SCR_ADC | \
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                      RBIT_SCR_HWDEN | RBIT_SCR_HWDCN1 | RBIT_SCR_EMWS)
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/* define the chip selects */
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#define CSEL_ROM           0            /* token pasted so no brackets */
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#define ROM_WAIT_STATES    (OR_DTACK_1) /* 100nsec at 16MHz */
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#define CSEL_RAM           3
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#define RAM_WAIT_STATES    (OR_DTACK_0) /* 70nsec at 16MHz */
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/* The remaining chip selects are called 1 and 2 */
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/*
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#define CSEL_1             1
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#define CSEL_1_BASE        (0x00?00000)
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#define CSEL_1_SIZE        (0x00?00000)
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#define CSEL_1_WAIT_STATES (OR_DTACK_1)
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*/
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#define CSEL_2             2
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#define CSEL_2_BASE        (0x00800000)
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#define CSEL_2_SIZE        (0x00040000)
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#define CSEL_2_WAIT_STATES (OR_DTACK_EXT)
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/*
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 * Need to define a watchdog period
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 */
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#define WATCHDOG_TIMEOUT_PERIOD (3000 * 2)
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/*
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 * Console and debug port allocation, 0=SCC1, 2=SCC3
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 */
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#define CONSOLE_PORT  1
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#define CONSOLE_BAUD  SCC_9600
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#define DEBUG_PORT    2
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#define DEBUG_BAUD    SCC_57600
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/* ----
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   Parallel Port Configuration, and default data directions
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   PORT  BITS - NAME                 , WHO       , DEFAULT WHAT
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   ------------------------------------------------------------
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   PPA:: 1: 0 - Serial               , PERIPHERAL, -
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   PPA:: 7: 2 - MVF_PPA:7:2          , IO        , INPUTS
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   PPA:: 9: 8 - Serial               , PERIPHERAL, -
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   PPA::15:10 - MVF_PPB:15:10        , IO        , INPUTS
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   PPB:: 1: 0 - Setup                , IO        , INPUTS
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   PPB:: 3: 2 - SYNC_HIGHWAY_1:2     , IO        , INPUTS
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              - SYNC_HIGHWAY_2:3     , IO        , INPUTS
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   PPB:: 4: 4 - HARDWARE_RESET:4     , IO        , OUTPUT
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   PPB:: 6: 5 - SOFTWARE_OVERRIDE_1:6, IO        , OUTPUT
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              - SOFTWARE_OVERRIDE_2:5, IO        , OUTPUT
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   PPB:: 7: 7 - Watchdog             , PERIPHERAL, -
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   PPB::11: 8 - Interrupt            , PERIPHERAL, -
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   PPB::15:12 - Not implemented on the 68302
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         15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
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   ------------------------------------------------------
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   PACNT  0  0  0  0  0  0  1  1  0  0  0  0  0  0  1  1 = 0x0303
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   PBCNT  -  -  -  -  -  -  -  -  1  0  0  0  0  0  0  0 = 0x0080
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   PADDR  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0 = 0x0000
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   PBDDR  0  0  0  0  0  0  0  0  0  1  1  1  0  0  0  0 = 0x0070
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   PADAT  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0 = 0x0000
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 */
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#define CARD_PA_CONFIGURATION       0x0303
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#define CARD_PB_CONFIGURATION       0x0080
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#define CARD_PA_DEFAULT_DIRECTIONS  0x0000
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#define CARD_PB_DEFAULT_DIRECTIONS  0x0070
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#define CARD_PA_DEFAULT_DATA        0x0000
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#define CARD_PB_DEFAULT_DATA        (HARDWARE_RESET_DISABLE | \
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                                     SOFTWARE_OVERRIDE_1_DISABLE | \
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                                     SOFTWARE_OVERRIDE_2_DISABLE)
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/* these are specific to the card and are not required */
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#define HARDWARE_RESET_ENABLE       0x0000
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#define HARDWARE_RESET_DISABLE      0x0010
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#define SOFTWARE_OVERRIDE_1_ENABLE  0x0000
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#define SOFTWARE_OVERRIDE_1_DISABLE 0x0040
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#define SOFTWARE_OVERRIDE_2_ENABLE  0x0000
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#define SOFTWARE_OVERRIDE_2_DISABLE 0x0020
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/*
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 * Card Specific Devices, these are not required. Add what ever you
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 * like here.
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 */
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/* Write */
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#define WRITE_REGISTER_8(address, data) \
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                 *((rtems_unsigned8 *) (address)) = ((rtems_unsigned8) (data))
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#define WRITE_REGISTER_16(address, data) \
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                 *((rtems_unsigned16 *) (address)) = ((rtems_unsigned16) (data))
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#define WRITE_REGISTER_32(address, data) \
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                 *((rtems_unsigned32 *) (address)) = ((rtems_unsigned32) (data))
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/* Read */
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#define READ_REGISTER_8(address, data) data = *((rtems_unsigned8 *) (address))
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#define READ_REGISTER_16(address, data) data = *((rtems_unsigned16 *) (address))
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#define READ_REGISTER_32(address, data) data = *((rtems_unsigned32 *) (address))
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/* CS2 : Peripherials */
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#define PERIPHERIALS_BASE         (CSEL_2_BASE)
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#define STATUS_REGISTER_BASE      (PERIPHERIALS_BASE + 0x00000000)
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#define PERIPHERIALS_SIZE         (0x00040000)
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#define LEDS_BASE                 (PERIPHERIALS_BASE + 0x00004000)
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#define MSC_BASE                  (PERIPHERIALS_BASE + 0x00008000)
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#define SPARE_1_BASE              (PERIPHERIALS_BASE + 0x0000C000)
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#define DISPLAY_BASE              (PERIPHERIALS_BASE + 0x00010000)
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#define PIO_INT_BASE              (PERIPHERIALS_BASE + 0x00014000)
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#define UART_BASE                 (PERIPHERIALS_BASE + 0x00018000)
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#define PIA_BASE                  (PERIPHERIALS_BASE + 0x0001C000)
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#define LED_1         0x0002
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#define LED_1_GREEN   0xFFFD                  
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#define LED_1_RED     0xFFFF
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#define LED_1_OFF     0xFFFC       
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#define LED_2         0x0001
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#define LED_2_GREEN   0xFFFE    
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#define LED_2_RED     0xFFFF
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#define LED_2_OFF     0xFFFC
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#define LED_3         0x0000
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#define LED_3_GREEN   0xFFFC    
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#define LED_3_RED     0xFFFC
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#define LED_3_OFF     0xFFFC
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#define LED_4         0x0000
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#define LED_4_GREEN   0xFFFC    
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#define LED_4_RED     0xFFFC
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#define LED_4_OFF     0xFFFC
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#define LED_5         0x0000
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#define LED_5_GREEN   0xFFFC    
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#define LED_5_RED     0xFFFC
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#define LED_5_OFF     0xFFFC
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#define LED_6         0x0000
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#define LED_6_GREEN   0xFFFC    
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#define LED_6_RED     0xFFFC
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#define LED_6_OFF     0xFFFC
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#define LED_7         0x0000
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#define LED_7_GREEN   0xFFFC    
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#define LED_7_RED     0xFFFC
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#define LED_7_OFF     0xFFFC
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#define LED_8         0x0000
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#define LED_8_GREEN   0xFFFC    
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#define LED_8_RED     0xFFFC
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#define LED_8_OFF     0xFFFC
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#define MAKE_LED(L1, L2, L3, L4) ((L1 & LED_1) | (L2 & LED_2) | (L3 & LED_3) | (L4 & LED_4))
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#define LED_CONTROL(L1, L2, L3, L4, L5, L6, L7, L8) \
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            WRITE_REGISTER_16(LEDS_BASE, MAKE_LED(L1, L2, L3, L4))
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 /* update the display, needs a long word */
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#define UPDATE_DISPLAY(LongWordPtr) \
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         ( WRITE_REGISTER_16(DISPLAY_BASE, *(((rtems_unsigned8 *) LongWordPtr) + 3)), \
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           WRITE_REGISTER_16(DISPLAY_BASE + 2, *(((rtems_unsigned8 *) LongWordPtr) + 2)), \
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           WRITE_REGISTER_16(DISPLAY_BASE + 4, *(((rtems_unsigned8 *) LongWordPtr) + 1)), \
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           WRITE_REGISTER_16(DISPLAY_BASE + 6, *((rtems_unsigned8 *) LongWordPtr)) )
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/* make a better test, say switches */
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#if defined(GDB_MONITOR_ACTIVE)
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#define GDB_RUN_MONITOR() (1 == 1)
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#else
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#define GDB_RUN_MONITOR() (1 == 0)
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#endif
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#if __cplusplus
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}
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#endif
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#endif

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