OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [m68k/] [ods68302/] [include/] [m68302scc.h] - Blame information for rev 173

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*****************************************************************************/
2
/*
3
  $Id: m68302scc.h,v 1.2 2001-09-27 12:00:21 chris Exp $
4
 
5
  M68302 Scc Polled Uart Support
6
 
7
 */
8
/*****************************************************************************/
9
 
10
#if !defined(_M68302SCC_H_)
11
#define _M68302SCC_H_
12
 
13
#if __cplusplus
14
extern "C"
15
{
16
#endif
17
 
18
#define SCC_4800    (0)
19
#define SCC_9600    (1)
20
#define SCC_19200   (2)
21
#define SCC_38400   (3)
22
#define SCC_57600   (4)
23
#define SCC_115700  (5)
24
 
25
void scc_initialise(int channel, int baud_rate, int lf_translate);
26
unsigned char scc_status(int channel, const unsigned char status);
27
unsigned char scc_in(int channel);
28
void scc_out(int channel, const unsigned char character);
29
 
30
#if __cplusplus
31
}
32
#endif
33
 
34
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.