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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [eth_comm/] [include/] [info.h] - Blame information for rev 173

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1 30 unneback
/* info.h - Defines board info block structure and macros for
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 *          handling elements of struct for ethernet comm board
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 *
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 * Written by Jay Monkman 7/21/98
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 * Copyright Frasca International, Inc 1998
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 *
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 *  $Id: info.h,v 1.2 2001-09-27 12:00:35 chris Exp $
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 */
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#ifndef __info_h__
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#define __info_h__
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typedef struct BoardInfoBlock_ {
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  rtems_unsigned16       size;         /* size of info block in bytes */
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  rtems_unsigned8        eth_id[6];    /* ethernet id of ethernet interface */
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  rtems_unsigned32       cpu_spd;      /* cpu speed in Hz */
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  rtems_unsigned32       flash_size;   /* size of flash memory in bytes */
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  rtems_unsigned32       ram_size;     /* size of ram in bytes */
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  rtems_unsigned32       version;      /* version of firmare (x.y format) */
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  rtems_unsigned32       if429;        /* mask for arinc429 interface */
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  rtems_unsigned32       ifcsdb;       /* mask for csdb interface */
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  rtems_unsigned16       if232;        /* mask for rs232 interface */
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  rtems_unsigned8        ifcan;        /* mask for canbus interface */
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  rtems_unsigned8        if568;        /* mask for arinc568 interface */
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  rtems_unsigned8        fpn[16];      /* Frasca part number in ASCII */
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  rtems_unsigned16       rev;          /* Board revision */
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  rtems_unsigned32       ip_num;       /* Board IP number */
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} boardinfo_t;
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#define IFACE_ARINC429_TX0 0x00000001;
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#define IFACE_ARINC429_RX0 0x00000002;
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#define IFACE_ARINC429_TX1 0x00000004;
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#define IFACE_ARINC429_RX1 0x00000008;
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#define IFACE_ARINC429_TX2 0x00000010;
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#define IFACE_ARINC429_RX2 0x00000020;
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#define IFACE_ARINC429_TX3 0x00000040;
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#define IFACE_ARINC429_RX3 0x00000080;
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#define IFACE_ARINC429_TX4 0x00000100;
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#define IFACE_ARINC429_RX4 0x00000200;
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#define IFACE_ARINC429_TX5 0x00000400;
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#define IFACE_ARINC429_RX5 0x00000800;
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#define IFACE_ARINC429_TX6 0x00001000;
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#define IFACE_ARINC429_RX6 0x00002000;
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#define IFACE_ARINC429_TX7 0x00004000;
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#define IFACE_ARINC429_RX7 0x00008000;
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#define IFACE_ARINC568_TX0 0x0001;
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#define IFACE_ARINC568_RX0 0x0002;
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#define IFACE_ARINC568_TX1 0x0004;
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#define IFACE_ARINC568_RX1 0x0008;
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#define IFACE_CSDB_TX0 0x00000001;
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#define IFACE_CSDB_RX0 0x00000002;
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#define IFACE_CSDB_TX1 0x00000004;
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#define IFACE_CSDB_RX1 0x00000008;
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#define IFACE_CSDB_TX2 0x00000010;
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#define IFACE_CSDB_RX2 0x00000020;
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#define IFACE_CSDB_TX3 0x00000040;
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#define IFACE_CSDB_RX3 0x00000080;
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#define IFACE_CSDB_TX4 0x00000100;
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#define IFACE_CSDB_RX4 0x00000200;
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#define IFACE_CSDB_TX5 0x00000400;
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#define IFACE_CSDB_RX5 0x00000800;
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#define IFACE_CSDB_TX6 0x00001000;
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#define IFACE_CSDB_RX6 0x00002000;
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#define IFACE_CSDB_TX7 0x00004000;
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#define IFACE_CSDB_RX7 0x00008000;
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#define IFACE_CSDB_TX8 0x00010000;
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#define IFACE_CSDB_RX8 0x00020000;
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#define IFACE_CAN_TX0 0x0001;
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#define IFACE_CAN_RX0 0x0002;
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#define IFACE_CAN_TX1 0x0004;
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#define IFACE_CAN_RX1 0x0008;
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#define IFACE_CAN_TX2 0x0010;
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#define IFACE_CAN_RX2 0x0020;
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#define IFACE_RS232_TX0 0x0001;
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#define IFACE_RS232_RX0 0x0002;
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#define IFACE_RS232_TX1 0x0004;
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#define IFACE_RS232_RX1 0x0008;
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#define IFACE_RS232_TX2 0x0010;
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#define IFACE_RS232_RX2 0x0020;
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#define IFACE_RS232_TX3 0x0040;
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#define IFACE_RS232_RX3 0x0080;
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#define IFACE_RS232_TX4 0x0100;
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#define IFACE_RS232_RX4 0x0200;
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#endif /* __info_h__*/

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