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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [eth_comm/] [startup/] [alloc860.c] - Blame information for rev 30

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1 30 unneback 
/*
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 * MPC860 buffer descriptor allocation routines
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 *
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 * Modified from original code by Jay Monkman (jmonkman@frasca.com)
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 *
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 * Original was written by:
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 * W. Eric Norum
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 * Saskatchewan Accelerator Laboratory
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 * University of Saskatchewan
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 * Saskatoon, Saskatchewan, CANADA
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 * eric@skatter.usask.ca
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 *
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 *  $Id: alloc860.c,v 1.2 2001-09-27 12:00:36 chris Exp $
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 */
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#include <rtems.h>
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#include <bsp.h>
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#include <rtems/rtems/intr.h>
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#include <rtems/error.h>
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#include <mpc860.h>
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#include <info.h>
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/*
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 * Send a command to the CPM RISC processer
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 */
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void M860ExecuteRISC(rtems_unsigned16 command)
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{
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  rtems_unsigned16 lvl;
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  rtems_interrupt_disable(lvl);
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  while (m860.cpcr & M860_CR_FLG) {
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    continue;
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  }
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  m860.cpcr = command | M860_CR_FLG;
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  rtems_interrupt_enable (lvl);
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}
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/*
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 * Allocation order:
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 *      - Dual-Port RAM section 0
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 *      - Dual-Port RAM section 1
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 *      - Dual-Port RAM section 2
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 *      - Dual-Port RAM section 3
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 *      - Dual-Port RAM section 4
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 */
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static struct {
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  char          *base;
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  unsigned int  size;
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  unsigned int  used;
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} bdregions[] = {
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  { (char *)&m860.dpram0[0],    sizeof m860.dpram0,     0 },
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  { (char *)&m860.dpram1[0],    sizeof m860.dpram1,     0 },
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  { (char *)&m860.dpram2[0],    sizeof m860.dpram2,     0 },
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  { (char *)&m860.dpram3[0],    sizeof m860.dpram3,     0 },
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  { (char *)&m860.dpram4[0],    sizeof m860.dpram4,     0 },
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};
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void *
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M860AllocateBufferDescriptors (int count)
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{
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  unsigned int i;
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  ISR_Level level;
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  void *bdp = NULL;
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  unsigned int want = count * sizeof(m860BufferDescriptor_t);
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  /*
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   * Running with interrupts disabled is usually considered bad
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   * form, but this routine is probably being run as part of an
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   * initialization sequence so the effect shouldn't be too severe.
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   */
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  _ISR_Disable (level);
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  for (i = 0 ; i < sizeof(bdregions) / sizeof(bdregions[0]) ; i++) {
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    /*
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     * Verify that the region exists.
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     * This test is necessary since some chips have
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     * less dual-port RAM.
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     */
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    if (bdregions[i].used == 0) {
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      volatile unsigned char *cp = bdregions[i].base;
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      *cp = 0xAA;
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      if (*cp != 0xAA) {
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        bdregions[i].used = bdregions[i].size;
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        continue;
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      }
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      *cp = 0x55;
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      if (*cp != 0x55) {
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        bdregions[i].used = bdregions[i].size;
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        continue;
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      }
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      *cp = 0x0;
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    }
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    if (bdregions[i].size - bdregions[i].used >= want) {
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      bdp = bdregions[i].base + bdregions[i].used;
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      bdregions[i].used += want;
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      break;
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    }
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  }
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  _ISR_Enable(level);
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  if (bdp == NULL)
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    rtems_panic("Can't allocate %d buffer descriptor(s).\n", count);
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  return bdp;
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}
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void *
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M860AllocateRiscTimers (int count)
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{
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  /*
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   * Convert the count to the number of buffer descriptors
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   * of equal or larger size.  This ensures that all buffer
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   * descriptors are allocated with appropriate alignment.
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   */
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  return M860AllocateBufferDescriptors (((count * 4) +
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                                         sizeof(m860BufferDescriptor_t) - 1) /
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                                        sizeof(m860BufferDescriptor_t));
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}

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