OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [helas403/] [README] - Blame information for rev 227

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
#
2
#  $Id: README,v 1.2 2001-09-27 12:00:36 chris Exp $
3
#
4
 
5
BSP NAME:           helas403
6
BOARD:              IMD, helas-ppc
7
BUS:                N/A
8
CPU FAMILY:         ppc
9
CPU:                PowerPC 403GA
10
COPROCESSORS:       N/A
11
MODE:               32 bit mode
12
 
13
DEBUG MONITOR:      Modified Motorola FBUG
14
 
15
PERIPHERALS
16
===========
17
TIMERS:             403GA internal
18
  RESOLUTION:         .04 microseconds
19
SERIAL PORTS:       403GA internal
20
REAL-TIME CLOCK:    403GA internal
21
DMA:                403GA internal
22
VIDEO:              none
23
SCSI:               none
24
NETWORKING:         none
25
 
26
DRIVER INFORMATION
27
==================
28
CLOCK DRIVER:       403GA internal
29
IOSUPP DRIVER:      N/A
30
SHMSUPP:            N/A
31
TIMER DRIVER:       403GA internal
32
TTY DRIVER:         403GA internal
33
 
34
STDIO
35
=====
36
PORT:               Console port 0
37
ELECTRICAL:         RS-232
38
BAUD:               9600
39
BITS PER CHARACTER: 8
40
PARITY:             None
41
STOP BITS:          1
42
 
43
Notes
44
=====
45
 
46
Board description
47
-----------------
48
clock rate:     25 MHz
49
bus width:      8-bit PROM, 32-bit DRAM
50
ROM:            Up to 512KByte (Am29F040), 90 nsec chip select 0
51
RAM:            4 to 32 MByte DRAM SIMM (autodetect), 70 nsec,
52
                no parity, at CS7 or CS6+CS7 (for two-bank-SIMMs)
53
 
54
 
55
helas403 only supports single processor operations.
56
 
57
Porting
58
-------
59
This board support package is written for a typical PPC403GA
60
system. The rough features of this board are described above.
61
 
62
This BSP contains files for two startup methods:
63
- Direct start from Flash after powerup (with code run out of flash):
64
  This is the default configuration, it uses the files
65
        flashentry/flashentry.s
66
        startup/linkcmds
67
 
68
 Please note, that this configuration is good to startup the system,
69
but it will not gain maximum performance due to slow Flash access (8
70
bit wide only)
71
 
72
- Start after software download into DRAM:
73
  This configuration will use:
74
        dlentry/dlentry.s
75
        startup/linkcmds.dl
76
 
77
If you want to use the download configuration, it is sufficient to
78
rename the file "startup/linkcmds.dl" to "startup/linkcmds", it will
79
automatically reference the dlentry.s as entry code. (Renaming is not
80
quite elegant, a more sophisticated solution will follow in future,
81
any hints welcome ;-)
82
 
83
For adapting this BSP to other boards, the following files should be
84
modified:
85
 
86
- c/src/lib/libbsp/powerpc/helas403/flashentry/flashentry.s
87
        for the memory controller configuration and other basic stuff
88
 
89
- c/src/lib/libbsp/powerpc/helas403/startup/linkcmds[.dl]
90
        for the memory layout required
91
 
92
- c/src/lib/libbsp/powerpc/helas403/startup/bspstart.c
93
        for adaption of BSP_Configuration. here you can select
94
        the clock source for the timers and the serial interface
95
        (system clock or external clock pin), the clock rates, initial
96
        baud rate and other stuff
97
 
98
- c/src/lib/libbsp/powerpc/helas403/include/bsp.h
99
        some BSP-related constants
100
 
101
The actual drivers are placed in
102
- c/src/lib/libcpu/powerpc/ppc403/*
103
        well, they should be generic, so there _should_ be no reason
104
        to mess around there (but who knows...)
105
 
106
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.