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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [helas403/] [startup/] [linkcmds] - Blame information for rev 173

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Line No. Rev Author Line
1 30 unneback
/*
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 *  This file contains directives for the GNU linker which are specific
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 *  to the helas-403
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 *  This file is intended to be used together with flashentry.s
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 *  it will generate a ROM that can be started directly after powerup reset
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 *  $Id: linkcmds,v 1.2 2001-09-27 12:00:36 chris Exp $
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 */
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OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
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              "elf32-powerpc")
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OUTPUT_ARCH(powerpc)
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 SEARCH_DIR(/usr/local/powerpc-rtems/lib);
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ENTRY(flash_entry)
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MEMORY
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  {
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        RAM : ORIGIN = 0, LENGTH = 8M
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        FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
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  }
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  /* DIRTY TRICK: repeat addresses here, so we can work with them... */
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  flash.start = 0xFFF00000;
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  flash.size  = 512K;
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SECTIONS
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{
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  .entry :
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  {
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     *(.entry)
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  } > FLASH /* this is ROM for flash_entry */
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  .text :
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  {
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     text.start = . ;
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     *(.entry2)
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     *(.text)
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     *(.rodata)
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     *(.rodata1)
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     *(.descriptors)
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     *(rom_ver)
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     etext = ALIGN(0x10);
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     _etext = .;
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     __CTOR_LIST__ = .;
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     LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
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     *(.ctors)
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     LONG(0)
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     __CTOR_END__ = .;
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     __DTOR_LIST__ = .;
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     LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
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     *(.dtors)
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     LONG(0)
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     __DTOR_END__ = .;
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     *(.lit)
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     *(.shdata)
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     *(.init)
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     *(.fini)
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     . = ALIGN(0x10);
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     _endtext = .;
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     text.end = .;
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     copy.src = .;
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     copy.tmptop.txt = .;
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  } > FLASH /* this is ROM for flash_entry */
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  text.size = text.end - text.start;
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  /* R/W Data */
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  /* place vectors to start at offset 0x100... */
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  /* IMPORTANT: sections ".fill" and ".vectors" must be the first in RAM!!*/
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  .fill 0x00010000 :
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  {
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    . = . + 0x0100;
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  } > RAM
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  .vectors :              AT (copy.src)
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  {
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    copy.dest = .;
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    *(.vectors)
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    . = ALIGN(0x10);
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    copy.tmptop.vec = .;
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  } > RAM
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  .data :                 AT (copy.tmptop.vec - copy.dest + copy.src)
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  {
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    *(.data)
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    *(.data1)
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    PROVIDE (__SDATA_START__ = .);
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    *(.sdata)
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    . = ALIGN(0x10);
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    copy.tmptop.dat = .;
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  } > RAM
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  PROVIDE (__EXCEPT_START__ = .);
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  .gcc_except_table   :   AT (copy.tmptop.dat - copy.dest + copy.src)
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  {
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    *(.gcc_except_table)
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    . = ALIGN(0x10);
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    copy.tmptop.exc = .;
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  } >RAM
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  PROVIDE (__EXCEPT_END__ = .);
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  __GOT_START__ = .;
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  .got :                  AT (copy.tmptop.exc - copy.dest + copy.src)
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  {
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    s.got = .;
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    *(.got.plt) *(.got)
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    . = ALIGN(0x10);
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    copy.tmptop.got = .;
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  } > RAM
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  __GOT_END__ = .;
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  .got1 :                 AT (copy.tmptop.got - copy.dest + copy.src)
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  {
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    *(.got1)
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    . = ALIGN(0x10);
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    copy.tmptop.gt1 = .;
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  } >RAM
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  PROVIDE (__GOT2_START__ = .);
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  PROVIDE (_GOT2_START_ = .);
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  .got2           :       AT (copy.tmptop.gt1 - copy.dest + copy.src)
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  {
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    *(.got2)
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    . = ALIGN(0x10);
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    copy.tmptop.gt2 = .;
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  } >RAM
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  PROVIDE (__GOT2_END__ = .);
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  PROVIDE (_GOT2_END_ = .);
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  PROVIDE (__FIXUP_START__ = .);
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  PROVIDE (_FIXUP_START_ = .);
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  .fixup          :       AT (copy.tmptop.gt2 - copy.dest + copy.src)
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  {
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    *(.fixup)
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    . = ALIGN(0x10);
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    copy.tmptop.fix = .;
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  } >RAM
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  PROVIDE (_FIXUP_END_ = .);
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  PROVIDE (__FIXUP_END__ = .);
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  PROVIDE (__SDATA2_START__ = .);
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  .sdata2         :       AT (copy.tmptop.fix - copy.dest + copy.src)
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  {
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    *(.sdata2)
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    . = ALIGN(0x10);
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    copy.tmptop.sda = .;
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  } >RAM
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  copy.size = copy.tmptop.sda - copy.dest;
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  .sbss2          :
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  {
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    *(.sbss2)
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  } >RAM
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  PROVIDE (__SBSS2_END__ = .);
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  __SBSS_START__ = .;
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  .bss :
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  {
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    bss.start = .;
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    *(.bss) *(.sbss) *(COMMON)
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    bss.end = ALIGN(4);
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  } > RAM
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  __SBSS_END__ = .;
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  bss.size = bss.end - bss.start;
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  /* reserve 16KByte for stack... */
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  stack.end = bss.end + 16K;
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  PROVIDE(_end = stack.end);
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  .line 0 : { *(.line) }
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  .debug 0 : { *(.debug) }
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  .debug_sfnames 0 : { *(.debug_sfnames) }
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  .debug_srcinfo 0 : { *(.debug_srcinfo) }
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  .debug_pubnames 0 : { *(.debug_pubnames) }
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  .debug_aranges 0 : { *(.debug_aranges) }
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  .debug_aregion 0 : { *(.debug_aregion) }
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  .debug_macinfo 0 : { *(.debug_macinfo) }
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  .stab 0 : { *(.stab) }
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  .stabstr 0 : { *(.stabstr) }
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  /*
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   * place reset instruction into last word of FLASH
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   * NOTE: after reset, PPC403 starts executing from address
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   * 0xFFFFFFFC
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   * The reset section is placed in ROM at 0xF7FFFFFC instead,
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   * but a mirror of this address exists at 0xFFFFFFFC due to
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   * the initial memory controller setup
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   */
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  .reset  flash.start - 4 + flash.size :
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  {
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    *(.reset)
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  } > FLASH
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}
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