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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [helas403/] [startup/] [linkcmds.dl] - Blame information for rev 173

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Line No. Rev Author Line
1 30 unneback
/*
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 *  This file contains directives for the GNU linker which are specific
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 *  to the helas403
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 *  This file is intended to be used together with dlentry.s
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 *  it will generate downloadable code
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 *
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 *  $Id: linkcmds.dl,v 1.2 2001-09-27 12:00:36 chris Exp $
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 */
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OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
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              "elf32-powerpc")
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OUTPUT_ARCH(powerpc)
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 SEARCH_DIR(/usr/local/powerpc-rtems/lib);
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ENTRY(download_entry)
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MEMORY
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  {
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        RAM : ORIGIN = 0, LENGTH = 8M
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        FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
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  }
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SECTIONS
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{
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  .vectors : 0x00010100
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  {
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    *(.vectors)
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  } > RAM
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  .text :
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  {
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     text.start = . ;
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     *(.entry)
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     *(.entry2)
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     *(.text)
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     *(.rodata)
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     *(.rodata1)
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     *(.descriptors)
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     *(rom_ver)
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     etext = ALIGN(0x10);
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     _etext = .;
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     __CTOR_LIST__ = .;
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     LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
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     *(.ctors)
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     LONG(0)
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     __CTOR_END__ = .;
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     __DTOR_LIST__ = .;
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     LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
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     *(.dtors)
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     LONG(0)
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     __DTOR_END__ = .;
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     *(.lit)
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     *(.shdata)
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     *(.init)
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     *(.fini)
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     _endtext = ALIGN(0x10);
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     text.end = .;
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  } > RAM
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  text.size = text.end - text.start;
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  /* R/W Data */
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  .data :
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  {
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    *(.data)
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    *(.data1)
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    PROVIDE (__SDATA_START__ = .);
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    *(.sdata)
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  } > RAM
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  PROVIDE (__EXCEPT_START__ = .);
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  .gcc_except_table   :
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  {
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        *(.gcc_except_table)
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  } >RAM
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  PROVIDE (__EXCEPT_END__ = .);
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  __GOT_START__ = .;
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  .got :
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  {
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     s.got = .;
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     *(.got.plt) *(.got)
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  } > RAM
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  __GOT_END__ = .;
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  .got1 :
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  {
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        *(.got1)
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  } >RAM
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  PROVIDE (__GOT2_START__ = .);
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  PROVIDE (_GOT2_START_ = .);
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  .got2           :
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  {
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        *(.got2)
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  } >RAM
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  PROVIDE (__GOT2_END__ = .);
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  PROVIDE (_GOT2_END_ = .);
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  PROVIDE (__FIXUP_START__ = .);
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  PROVIDE (_FIXUP_START_ = .);
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  .fixup          : { *(.fixup)         } >RAM
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  PROVIDE (_FIXUP_END_ = .);
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  PROVIDE (__FIXUP_END__ = .);
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  PROVIDE (__SDATA2_START__ = .);
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  .sdata2         : { *(.sdata2)        } >RAM
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  .sbss2          : { *(.sbss2)         } >RAM
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  PROVIDE (__SBSS2_END__ = .);
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  .sbss2          : { *(.sbss2)         } >RAM
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  PROVIDE (__SBSS2_END__ = .);
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  __SBSS_START__ = .;
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  .bss :
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  {
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    bss.start = .;
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    *(.bss) *(.sbss) *(COMMON)
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    bss.end = ALIGN(4);
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  } > RAM
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  __SBSS_END__ = .;
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  bss.size = bss.end - bss.start;
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  PROVIDE(_end = bss.end);
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  .line 0 : { *(.line) }
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  .debug 0 : { *(.debug) }
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  .debug_sfnames 0 : { *(.debug_sfnames) }
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  .debug_srcinfo 0 : { *(.debug_srcinfo) }
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  .debug_pubnames 0 : { *(.debug_pubnames) }
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  .debug_aranges 0 : { *(.debug_aranges) }
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  .debug_aregion 0 : { *(.debug_aregion) }
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  .debug_macinfo 0 : { *(.debug_macinfo) }
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  .stab 0 : { *(.stab) }
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  .stabstr 0 : { *(.stabstr) }
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}
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