1 |
30 |
unneback |
/* Structure map for CMOS on PowerPC Reference Platform */
|
2 |
|
|
/*
|
3 |
|
|
* COPYRIGHT (c) 1998 by Radstone Technology
|
4 |
|
|
*
|
5 |
|
|
*
|
6 |
|
|
* THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
|
7 |
|
|
* KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
|
8 |
|
|
* IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
|
9 |
|
|
* AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
|
10 |
|
|
*
|
11 |
|
|
* You are hereby granted permission to use, copy, modify, and distribute
|
12 |
|
|
* this file, provided that this notice, plus the above copyright notice
|
13 |
|
|
* and disclaimer, appears in all copies. Radstone Technology will provide
|
14 |
|
|
* no support for this code.
|
15 |
|
|
*
|
16 |
|
|
*/
|
17 |
|
|
/* CMOS is the 64 bytes of RAM in the DS1385 chip */
|
18 |
|
|
/* The CRC's are computed with x**16+x**12+x**5 + 1 polynomial */
|
19 |
|
|
/* The clock is kept in 24 hour BCD mode and should be set to UT(GMT) */
|
20 |
|
|
|
21 |
|
|
#ifndef _CMOS_
|
22 |
|
|
#define _CMOS_
|
23 |
|
|
|
24 |
|
|
/*
|
25 |
|
|
* Address port is at 0x70, data at 0x71
|
26 |
|
|
*/
|
27 |
|
|
#define RTC_PORT 0x70
|
28 |
|
|
|
29 |
|
|
/* Define Realtime Clock register numbers. */
|
30 |
|
|
|
31 |
|
|
#define RTC_SECOND 0 /* second of minute [0..59] */
|
32 |
|
|
#define RTC_SECOND_ALARM 1 /* seconds to alarm */
|
33 |
|
|
#define RTC_MINUTE 2 /* minute of hour [0..59] */
|
34 |
|
|
#define RTC_MINUTE_ALARM 3 /* minutes to alarm */
|
35 |
|
|
#define RTC_HOUR 4 /* hour of day [0..23] */
|
36 |
|
|
#define RTC_HOUR_ALARM 5 /* hours to alarm */
|
37 |
|
|
#define RTC_DAY_OF_WEEK 6 /* day of week [1..7] */
|
38 |
|
|
#define RTC_DAY_OF_MONTH 7 /* day of month [1..31] */
|
39 |
|
|
#define RTC_MONTH 8 /* month of year [1..12] */
|
40 |
|
|
#define RTC_YEAR 9 /* year [00..99] */
|
41 |
|
|
#define RTC_CONTROL_REGISTERA 10 /* control register A */
|
42 |
|
|
#define RTC_CONTROL_REGISTERB 11 /* control register B */
|
43 |
|
|
#define RTC_CONTROL_REGISTERC 12 /* control register C */
|
44 |
|
|
#define RTC_CONTROL_REGISTERD 13 /* control register D */
|
45 |
|
|
#define RTC_BATTERY_BACKED_UP_RAM 14 /* battery backed up RAM [0..49] */
|
46 |
|
|
|
47 |
|
|
/* Define Control Register A structure. */
|
48 |
|
|
#define DS1385_REGA_UIP 0x80
|
49 |
|
|
|
50 |
|
|
/* Define Control Register B structure. */
|
51 |
|
|
#define DS1385_REGB_SET_TIME 0x80
|
52 |
|
|
#define DS1385_REGB_TIM_IRQ_EN 0x40
|
53 |
|
|
#define DS1385_REGB_ALM_IRQ_EN 0x20
|
54 |
|
|
#define DS1385_REGB_UPD_IRQ_EN 0x10
|
55 |
|
|
#define DS1385_REGB_SQR_EN 0x08
|
56 |
|
|
#define DS1385_REGB_DATA_M 0x04
|
57 |
|
|
#define DS1385_REGB_HOURS_FMT 0x02
|
58 |
|
|
#define DS1385_REGB_DLS_EN 0x01
|
59 |
|
|
|
60 |
|
|
/* Define Control Register C structure. */
|
61 |
|
|
#define DS1385_REGC_IRQ_REQ 0x08
|
62 |
|
|
#define DS1385_REGC_IRQ_TIME 0x04
|
63 |
|
|
#define DS1385_REGC_IRQ_ALM 0x02
|
64 |
|
|
#define DS1385_REGC_IRQ_UPD 0x01
|
65 |
|
|
|
66 |
|
|
/* Define Control Register D structure. */
|
67 |
|
|
#define DS1385_REGD_VALID 0x80
|
68 |
|
|
|
69 |
|
|
typedef struct _CMOS_MAP {
|
70 |
|
|
volatile rtems_unsigned8 DateAndTime[14];
|
71 |
|
|
|
72 |
|
|
rtems_unsigned8 SystemDependentArea1[2];
|
73 |
|
|
rtems_unsigned8 SystemDependentArea2[8];
|
74 |
|
|
rtems_unsigned8 FeatureByte0[1];
|
75 |
|
|
rtems_unsigned8 FeatureByte1[1]; /* 19 = PW Flag;
|
76 |
|
|
attribute = write protect */
|
77 |
|
|
rtems_unsigned8 Century[1]; /* century byte in BCD, e.g. 0x19 currently */
|
78 |
|
|
rtems_unsigned8 FeatureByte3[1];
|
79 |
|
|
rtems_unsigned8 FeatureByte4[1];
|
80 |
|
|
rtems_unsigned8 FeatureByte5[1];
|
81 |
|
|
rtems_unsigned8 FeatureByte6[1];
|
82 |
|
|
rtems_unsigned8 FeatureByte7[1]; /* 1F = Alternate PW Flag;
|
83 |
|
|
attribute = write protect */
|
84 |
|
|
rtems_unsigned8 BootPW[14]; /* Power-on password needed to boot system;
|
85 |
|
|
reset value = 0x00000000000000005a5a5a5a5a5a);
|
86 |
|
|
attribute = lock */
|
87 |
|
|
rtems_unsigned8 BootCrc[2]; /* CRC on BootPW */
|
88 |
|
|
rtems_unsigned8 ConfigPW[14]; /* Configuration Password needed to
|
89 |
|
|
change configuration of system;
|
90 |
|
|
reset value = 0x00000000000000005a5a5a5a5a5a);
|
91 |
|
|
attribute = lock */
|
92 |
|
|
rtems_unsigned8 ConfigCrc[2]; /* CRC on ConfigPW */
|
93 |
|
|
} CMOS_MAP, *PCMOS_MAP;
|
94 |
|
|
|
95 |
|
|
#endif /* _CMOS_ */
|