OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [psim/] [shmsupp/] [lock.c] - Blame information for rev 562

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*  Shared Memory Lock Routines
2
 *
3
 *  This shared memory locked queue support routine need to be
4
 *  able to lock the specified locked queue.  Interrupts are
5
 *  disabled while the queue is locked to prevent preemption
6
 *  and deadlock when two tasks poll for the same lock.
7
 *  previous level.
8
 *
9
 *  COPYRIGHT (c) 1989-1997.
10
 *  On-Line Applications Research Corporation (OAR).
11
 *  Copyright assigned to U.S. Government, 1994.
12
 *
13
 *  The license and distribution terms for this file may in
14
 *  the file LICENSE in this distribution or at
15
 *  http://www.OARcorp.com/rtems/license.html.
16
 *
17
 *  $Id: lock.c,v 1.2 2001-09-27 12:01:02 chris Exp $
18
 */
19
 
20
#include <rtems.h>
21
#include <bsp.h>
22
#include <shm_driver.h>
23
 
24
typedef volatile unsigned int volint;
25
 
26
/*
27
 *  Shm_Initialize_lock
28
 *
29
 *  Initialize the lock for the specified locked queue.
30
 */
31
 
32
void Shm_Initialize_lock(
33
  Shm_Locked_queue_Control *lq_cb
34
)
35
{
36
  /* nothing required -- done implicitly by device tree */
37
}
38
 
39
/*  void _Shm_Lock( &lq_cb )
40
 *
41
 *  This shared memory locked queue support routine locks the
42
 *  specified locked queue.  It disables interrupts to prevent
43
 *  a deadlock condition.
44
 */
45
 
46
void Shm_Lock(
47
  Shm_Locked_queue_Control *lq_cb
48
)
49
{
50
  volint *p = (volint *)0xc0010000;
51
 
52
  (void) p[1];
53
}
54
 
55
/*
56
 *  Shm_Unlock
57
 *
58
 *  Unlock the lock for the specified locked queue.
59
 */
60
 
61
void Shm_Unlock(
62
  Shm_Locked_queue_Control *lq_cb
63
)
64
{
65
  volint *p = (volint *)0xc0010000;
66
 
67
  (void) p[2];
68
}
69
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.