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/*
 *  This file contains the console driver chip level routines for the
 *  z85c30 chip.
 *
 *  Currently only polled mode is supported.
 *
 *  COPYRIGHT (c) 1989-1997.
 *  On-Line Applications Research Corporation (OAR).
 *  Copyright assigned to U.S. Government, 1994.
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id:
 */
 
#include <rtems.h>
#include <bsp.h>
#include <rtems/libio.h>
#include <assert.h>
 
#include "85c30.h"
#include "consolebsp.h"
 
#define STATUS_REGISTER     0x00
#define DATA_REGISTER       0x08
 
 
#define Z8530_Status_Is_RX_character_available( _status ) \
  ( (_status) & 0x01 )
 
#define Z8530_Status_Is_TX_buffer_empty( _status ) \
  ( (_status) & 0x04 )
 
#define Z8530_Status_Is_break_abort( _status ) \
  ( (_status) & 0x80 )
 
typedef struct {
  unsigned char read_setup;
  unsigned char write_setup;
  unsigned char mask_value;
} char_size_info;
 
static const char_size_info Char_size_85c30[] = {
  { Z8530_READ_CHARACTER_BITS_8, Z8530_WRITE_CHARACTER_BITS_8, 0xFF },
  { Z8530_READ_CHARACTER_BITS_7, Z8530_WRITE_CHARACTER_BITS_7, 0x7F },
  { Z8530_READ_CHARACTER_BITS_6, Z8530_WRITE_CHARACTER_BITS_6, 0x3F },
  { Z8530_READ_CHARACTER_BITS_5, Z8530_WRITE_CHARACTER_BITS_5, 0x1F }
};
 
static const unsigned char Clock_speed_85c30[] = {
  Z8530_x1_CLOCK, Z8530_x16_CLOCK, Z8530_x32_CLOCK,  Z8530_x64_CLOCK };
 
static const unsigned char Stop_bit_85c30[] = {
  Z8530_STOP_BITS_1, Z8530_STOP_BITS_1_AND_A_HALF, Z8530_STOP_BITS_2 };
 
static const unsigned char Parity_85c30[] = {
  Z8530_PARITY_NONE, Z8530_PARITY_ODD, Z8530_PARITY_EVEN };
 
 
/* PAGE
 *
 * Read_85c30_register
 *
 * Read a Z85c30 register
 */
static unsigned char Read_85c30_register(
  volatile unsigned char *csr,                        /* IN  */
  unsigned char  register_number                      /* IN  */
)
{
  unsigned char Data;
 
  *csr = register_number;
 
  delay_in_bus_cycles( 40 );
 
  Data = *csr;
 
  delay_in_bus_cycles( 40 );
 
  return Data;
}
 
/*
 * Write_85c30_register
 *
 *  Write a Z85c30 register
 */
static void  Write_85c30_register(
  volatile unsigned char  *csr,                     /* IN  */
  unsigned char  register_number,                   /* IN  */
  unsigned char  data                               /* IN  */
)
{
  *csr = register_number;
 
  delay_in_bus_cycles( 40 );
 
  *csr = data;
 
  delay_in_bus_cycles( 40 );
}
 
 
/* PAGE
 *
 *  Reset_85c30_chip
 *
 *  Reset a 85c30 chip.  The pointers for the control registers for both
 *  ports on the chip are used as input.
 */
void Reset_85c30_chip(
  volatile unsigned char *ctrl_0,                     /* IN  */
  volatile unsigned char *ctrl_1                      /* IN  */
)
{
  Write_85c30_register( ctrl_0, 0x09, 0x80 );
  Write_85c30_register( ctrl_1, 0x09, 0x40 );
}
 
 
/* PAGE
 *
 * initialize_85c30_port
 *
 * initialize a z85c30 Port
 */
void initialize_85c30_port(
  const Port_85C30_info *Port
)
{
  rtems_unsigned16        value;
  volatile unsigned char *ctrl;
  Console_Protocol        *Setup;
  rtems_unsigned16        baud_constant;
 
  Setup = Port->Protocol;
  ctrl  = Port->ctrl;
 
  baud_constant = _Score603e_Z8530_Baud( Port->Chip->clock_frequency,
    Port->Chip->clock_x, Setup->baud_rate );
 
  /*
   * Using register 4
   * Set up the clock rate.
   */
  value = Clock_speed_85c30[ Port->Chip->clock_speed ] |
          Stop_bit_85c30[ Setup->stop_bits ] |
          Parity_85c30[ Setup->parity ];
  Write_85c30_register( ctrl, 0x04, value );
 
  /*
   *  Set Write Register 1 to disable all interrupts
   */
  Write_85c30_register( ctrl, 1, 0 );
 
#if CONSOLE_USE_INTERRUPTS
  /*
   *  Set Write Register 2 to contain the interrupt vector
   */
  Write_85c30_register( ctrl, 2, Port->Chip->vector );
#endif
 
  /*
   *  Set Write Register 3 to disable the Receiver
   */
  Write_85c30_register( ctrl, 0x03, 0x00 );
 
  /*
   *  Set Write Register 5 to disable the Transmitter
   */
  Write_85c30_register( ctrl, 5, 0x00 );
 
  /* WR 6 -- unneeded in asynchronous mode */
 
  /* WR 7 -- unneeded in asynchronous mode */
 
  /*
   *  Set Write Register 9 to disable all interrupt sources
   */
  Write_85c30_register( ctrl, 9, 0x00 );
 
  /*
   *  Set Write Register 10 for simple Asynchronous operation
   */
  Write_85c30_register( ctrl, 0x0a, 0x00 );
 
  /*
   * Setup the source of the receive and xmit
   * clock as BRG output and the transmit clock
   * as the output source for TRxC pin via register 11
   */
  Write_85c30_register( ctrl, 0x0b, 0x56 );
 
  value = baud_constant;
 
  /*
   * Setup the lower 8 bits time constants = 1E.
   * If the time constans = 1E, then the desire
   * baud rate will be equilvalent to 9600, via register 12.
   */
  Write_85c30_register( ctrl, 0x0c, value & 0xff );
 
  /*
   * using register 13
   * Setup the upper 8 bits time constants = 0
   */
  Write_85c30_register( ctrl, 0x0d, value>>8 );
 
  /*
   * Set the DTR/REQ pin goes low when transmit
   * buffer becomes empty and enable the baud
   * rate generator enable with clock from the
   * SCC's PCLK input via register 14.
   */
  Write_85c30_register( ctrl, 0x0e, 0x07 );
 
  /*
   *  Set Write Register 3 : Base Value is xx00_000x
   *     D6 - D7 : Receive Character Length               (configured)
   *     D5      : Auto Enable                            (forced value)
   *     D4      : Enter Hunt Phase                       (forced value)
   *     D3      : Receive CRC Enable                     (forced value)
   *     D2      : Address Search Mode (0 if not SDLC)    (forced value)
   *     D1      : Sync Character Load Inhibit            (forced value)
   *     D0      : Receiver Enable                        (configured)
   */
  value = 0x01;
  value = value | Char_size_85c30[ Setup->read_char_bits ].read_setup;
 
  Write_85c30_register( ctrl, 0x03, value );
 
  /*
   *  Set Write Register 5 : Base Value is 0xx0_x000
   *     D7      : Data Terminal Ready (DTR)              (forced value)
   *     D5 - D6 : Transmit Character Length              (configured)
   *     D4      : Send Break                             (forced value)
   *     D3      : Transmitter Enable                     (configured)
   *     D2      : CRC Select                             (forced value)
   *     D1      : Request to Send                        (forced value)
   *     D0      : Transmit CRC Enable                    (forced value)
   */
  value = 0x8a;
  value = value |  Char_size_85c30[ Setup->write_char_bits ].write_setup;
  Write_85c30_register( ctrl, 0x05, value );
 
  /*
   * Reset Tx UNDERRUN/EOM LATCH and ERROR
   * via register 0
   */
   Write_85c30_register( ctrl, 0x00, 0xf0 );
 
#if CONSOLE_USE_INTERRUPTS
  /*
   *  Set Write Register 1 to interrupt on Rx characters or special condition.
   */
  Write_85c30_register( ctrl, 1, 0x10 );
#endif
 
  /*
   *  Set Write Register 15 to disable extended functions.
   */
 
  Write_85c30_register( ctrl, 15, 0x00 );
 
  /*
   *  Set the Command Register to Reset Ext/STATUS.
   */
  Write_85c30_register( ctrl, 0x00, 0x10 );
 
#if CONSOLE_USE_INTERRUPTS
 
  /*
   *  Set Write Register 1 : Base Value is 0001_0110
   *    Enables Rx interrupt on all characters and special conditions.
   *    Enables parity as a special condition.
   *    Enables Tx interrupt.
   */
  Write_85c30_register( ctrl, 1, 0x16 );
 
  /*
   *  Set Write Register 9 to enable all interrupt sources
   *  Changed from 0 to a
   */
  Write_85c30_register( ctrl, 9, 0x0A );
 
 
  /* XXX */
 
  /*
   *  Issue reset highest Interrupt Under Service (IUS) command.
   */
  Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 );
 
#endif
 
}
 
/* PAGE
 *
 *  outbyte_polled_85c30
 *
 *  This routine transmits a character using polling.
 */
 
void outbyte_polled_85c30(
  volatile unsigned char  *csr,                     /* IN  */
  char ch                                           /* IN  */
)
{
  unsigned char       z8530_status;
  rtems_unsigned32    isrlevel;
 
  rtems_interrupt_disable( isrlevel );
 
  /*
   * Wait for the Transmit buffer to indicate that it is empty.
   */
  do {
    z8530_status = Read_85c30_register( csr, STATUS_REGISTER );
  } while ( !Z8530_Status_Is_TX_buffer_empty( z8530_status ) );
 
  /*
   * Write the character.
   */
  Write_85c30_register( csr, DATA_REGISTER, (unsigned char) ch );
 
  rtems_interrupt_enable( isrlevel );
}
 
/* PAGE
 *
 *  inbyte_nonblocking_85c30
 *
 *  This routine polls for a character.
 */
 
int inbyte_nonblocking_85c30(
  const Port_85C30_info      *Port
)
{
  volatile unsigned char  *csr;
  unsigned char   z8530_status;
  rtems_unsigned8 data;
 
  csr = Port->ctrl;
 
  /*
   * return -1 if a character is not available.
   */
  z8530_status = Read_85c30_register( csr, STATUS_REGISTER );
  if ( !Z8530_Status_Is_RX_character_available( z8530_status ) )
    return -1;
 
  /*
   * Return the character read.
   */
  data = Read_85c30_register( csr, DATA_REGISTER );
  data &= Char_size_85c30[ Port->Protocol->read_char_bits ].mask_value;
 
  return data;
}
 
 
/*
 *  Interrupt driven console IO
 */
 
#if CONSOLE_USE_INTERRUPTS
 
/*PAGE
 *
 *  Z8530_Async_Channel_ISR
 *
 */
/* RR0 */
 
rtems_isr ISR_85c30_Async(
   const Port_85C30_info   *Port
)
{
  rtems_unsigned16           status;
  volatile Console_Protocol *Protocol;
  unsigned char              data;
  rtems_boolean              did_something = FALSE;
 
  Protocol = Port->Protocol;
 
  status = Read_85c30_register( Port->ctrl, 0x00 );
 
  /*
   *  Was this a RX interrupt?  If so, then process it.
   */
 
  if ( Z8530_Status_Is_RX_character_available( status ) ) {
    data = Read_85c30_register( Port->ctrl, DATA_REGISTER );
    data &= Char_size_85c30[ Port->Protocol->read_char_bits ].mask_value;
 
    rtems_termios_enqueue_raw_characters( Port->Protocol->console_termios_data,
       &data, 1 );
    did_something = TRUE;
  }
 
  /*
   *  Was this a TX empty interrupt?  If so, then process it.
   */
 
  if (Z8530_Status_Is_TX_buffer_empty( status ) ) {
    if ( !Ring_buffer_Is_empty( &Protocol->TX_Buffer ) ) {
      Ring_buffer_Remove_character( &Protocol->TX_Buffer, data );
      Write_85c30_register( Port->ctrl, DATA_REGISTER, data );
 
    } else {
      Protocol->Is_TX_active = FALSE;
      Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x28 );
    }
 
    did_something = TRUE;
  }
 
  /*
   *  Issue reset highest Interrupt Under Service (IUS) command.
   */
 
  /*
   if ( did_something )
   */
     Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 );
}
 
#endif
 

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [console/] [85c30.c] - Blame information for rev 173

Line No.	Rev	Author	Line
1	30	unneback	`/*`
2			`* This file contains the console driver chip level routines for the`
3			`* z85c30 chip.`
4			`*`
5			`* Currently only polled mode is supported.`
6			`*`
7			`* COPYRIGHT (c) 1989-1997.`
8			`* On-Line Applications Research Corporation (OAR).`
9			`* Copyright assigned to U.S. Government, 1994.`
10			`*`
11			`* The license and distribution terms for this file may be`
12			`* found in the file LICENSE in this distribution or at`
13			`* http://www.OARcorp.com/rtems/license.html.`
14			`*`
15			`* $Id:`
16			`*/`
17
18			`#include <rtems.h>`
19			`#include <bsp.h>`
20			`#include <rtems/libio.h>`
21			`#include <assert.h>`
22
23			`#include "85c30.h"`
24			`#include "consolebsp.h"`
25
26			`#define STATUS_REGISTER 0x00`
27			`#define DATA_REGISTER 0x08`
28
29
30			`#define Z8530_Status_Is_RX_character_available( _status ) \`
31			`( (_status) & 0x01 )`
32
33			`#define Z8530_Status_Is_TX_buffer_empty( _status ) \`
34			`( (_status) & 0x04 )`
35
36			`#define Z8530_Status_Is_break_abort( _status ) \`
37			`( (_status) & 0x80 )`
38
39			`typedef struct {`
40			`unsigned char read_setup;`
41			`unsigned char write_setup;`
42			`unsigned char mask_value;`
43			`} char_size_info;`
44
45			`static const char_size_info Char_size_85c30[] = {`
46			`{ Z8530_READ_CHARACTER_BITS_8, Z8530_WRITE_CHARACTER_BITS_8, 0xFF },`
47			`{ Z8530_READ_CHARACTER_BITS_7, Z8530_WRITE_CHARACTER_BITS_7, 0x7F },`
48			`{ Z8530_READ_CHARACTER_BITS_6, Z8530_WRITE_CHARACTER_BITS_6, 0x3F },`
49			`{ Z8530_READ_CHARACTER_BITS_5, Z8530_WRITE_CHARACTER_BITS_5, 0x1F }`
50			`};`
51
52			`static const unsigned char Clock_speed_85c30[] = {`
53			`Z8530_x1_CLOCK, Z8530_x16_CLOCK, Z8530_x32_CLOCK, Z8530_x64_CLOCK };`
54
55			`static const unsigned char Stop_bit_85c30[] = {`
56			`Z8530_STOP_BITS_1, Z8530_STOP_BITS_1_AND_A_HALF, Z8530_STOP_BITS_2 };`
57
58			`static const unsigned char Parity_85c30[] = {`
59			`Z8530_PARITY_NONE, Z8530_PARITY_ODD, Z8530_PARITY_EVEN };`
60
61
62			`/* PAGE`
63			`*`
64			`* Read_85c30_register`
65			`*`
66			`* Read a Z85c30 register`
67			`*/`
68			`static unsigned char Read_85c30_register(`
69			`volatile unsigned char csr, / IN */`
70			`unsigned char register_number /* IN */`
71			`)`
72			`{`
73			`unsigned char Data;`
74
75			`*csr = register_number;`
76
77			`delay_in_bus_cycles( 40 );`
78
79			`Data = *csr;`
80
81			`delay_in_bus_cycles( 40 );`
82
83			`return Data;`
84			`}`
85
86			`/*`
87			`* Write_85c30_register`
88			`*`
89			`* Write a Z85c30 register`
90			`*/`
91			`static void Write_85c30_register(`
92			`volatile unsigned char csr, / IN */`
93			`unsigned char register_number, /* IN */`
94			`unsigned char data /* IN */`
95			`)`
96			`{`
97			`*csr = register_number;`
98
99			`delay_in_bus_cycles( 40 );`
100
101			`*csr = data;`
102
103			`delay_in_bus_cycles( 40 );`
104			`}`
105
106
107			`/* PAGE`
108			`*`
109			`* Reset_85c30_chip`
110			`*`
111			`* Reset a 85c30 chip. The pointers for the control registers for both`
112			`* ports on the chip are used as input.`
113			`*/`
114			`void Reset_85c30_chip(`
115			`volatile unsigned char ctrl_0, / IN */`
116			`volatile unsigned char ctrl_1 / IN */`
117			`)`
118			`{`
119			`Write_85c30_register( ctrl_0, 0x09, 0x80 );`
120			`Write_85c30_register( ctrl_1, 0x09, 0x40 );`
121			`}`
122
123
124			`/* PAGE`
125			`*`
126			`* initialize_85c30_port`
127			`*`
128			`* initialize a z85c30 Port`
129			`*/`
130			`void initialize_85c30_port(`
131			`const Port_85C30_info *Port`
132			`)`
133			`{`
134			`rtems_unsigned16 value;`
135			`volatile unsigned char *ctrl;`
136			`Console_Protocol *Setup;`
137			`rtems_unsigned16 baud_constant;`
138
139			`Setup = Port->Protocol;`
140			`ctrl = Port->ctrl;`
141
142			`baud_constant = _Score603e_Z8530_Baud( Port->Chip->clock_frequency,`
143			`Port->Chip->clock_x, Setup->baud_rate );`
144
145			`/*`
146			`* Using register 4`
147			`* Set up the clock rate.`
148			`*/`
149			`value = Clock_speed_85c30[ Port->Chip->clock_speed ] \|`
150			`Stop_bit_85c30[ Setup->stop_bits ] \|`
151			`Parity_85c30[ Setup->parity ];`
152			`Write_85c30_register( ctrl, 0x04, value );`
153
154			`/*`
155			`* Set Write Register 1 to disable all interrupts`
156			`*/`
157			`Write_85c30_register( ctrl, 1, 0 );`
158
159			`#if CONSOLE_USE_INTERRUPTS`
160			`/*`
161			`* Set Write Register 2 to contain the interrupt vector`
162			`*/`
163			`Write_85c30_register( ctrl, 2, Port->Chip->vector );`
164			`#endif`
165
166			`/*`
167			`* Set Write Register 3 to disable the Receiver`
168			`*/`
169			`Write_85c30_register( ctrl, 0x03, 0x00 );`
170
171			`/*`
172			`* Set Write Register 5 to disable the Transmitter`
173			`*/`
174			`Write_85c30_register( ctrl, 5, 0x00 );`
175
176			`/* WR 6 -- unneeded in asynchronous mode */`
177
178			`/* WR 7 -- unneeded in asynchronous mode */`
179
180			`/*`
181			`* Set Write Register 9 to disable all interrupt sources`
182			`*/`
183			`Write_85c30_register( ctrl, 9, 0x00 );`
184
185			`/*`
186			`* Set Write Register 10 for simple Asynchronous operation`
187			`*/`
188			`Write_85c30_register( ctrl, 0x0a, 0x00 );`
189
190			`/*`
191			`* Setup the source of the receive and xmit`
192			`* clock as BRG output and the transmit clock`
193			`* as the output source for TRxC pin via register 11`
194			`*/`
195			`Write_85c30_register( ctrl, 0x0b, 0x56 );`
196
197			`value = baud_constant;`
198
199			`/*`
200			`* Setup the lower 8 bits time constants = 1E.`
201			`* If the time constans = 1E, then the desire`
202			`* baud rate will be equilvalent to 9600, via register 12.`
203			`*/`
204			`Write_85c30_register( ctrl, 0x0c, value & 0xff );`
205
206			`/*`
207			`* using register 13`
208			`* Setup the upper 8 bits time constants = 0`
209			`*/`
210			`Write_85c30_register( ctrl, 0x0d, value>>8 );`
211
212			`/*`
213			`* Set the DTR/REQ pin goes low when transmit`
214			`* buffer becomes empty and enable the baud`
215			`* rate generator enable with clock from the`
216			`* SCC's PCLK input via register 14.`
217			`*/`
218			`Write_85c30_register( ctrl, 0x0e, 0x07 );`
219
220			`/*`
221			`* Set Write Register 3 : Base Value is xx00_000x`
222			`* D6 - D7 : Receive Character Length (configured)`
223			`* D5 : Auto Enable (forced value)`
224			`* D4 : Enter Hunt Phase (forced value)`
225			`* D3 : Receive CRC Enable (forced value)`
226			`* D2 : Address Search Mode (0 if not SDLC) (forced value)`
227			`* D1 : Sync Character Load Inhibit (forced value)`
228			`* D0 : Receiver Enable (configured)`
229			`*/`
230			`value = 0x01;`
231			`value = value \| Char_size_85c30[ Setup->read_char_bits ].read_setup;`
232
233			`Write_85c30_register( ctrl, 0x03, value );`
234
235			`/*`
236			`* Set Write Register 5 : Base Value is 0xx0_x000`
237			`* D7 : Data Terminal Ready (DTR) (forced value)`
238			`* D5 - D6 : Transmit Character Length (configured)`
239			`* D4 : Send Break (forced value)`
240			`* D3 : Transmitter Enable (configured)`
241			`* D2 : CRC Select (forced value)`
242			`* D1 : Request to Send (forced value)`
243			`* D0 : Transmit CRC Enable (forced value)`
244			`*/`
245			`value = 0x8a;`
246			`value = value \| Char_size_85c30[ Setup->write_char_bits ].write_setup;`
247			`Write_85c30_register( ctrl, 0x05, value );`
248
249			`/*`
250			`* Reset Tx UNDERRUN/EOM LATCH and ERROR`
251			`* via register 0`
252			`*/`
253			`Write_85c30_register( ctrl, 0x00, 0xf0 );`
254
255			`#if CONSOLE_USE_INTERRUPTS`
256			`/*`
257			`* Set Write Register 1 to interrupt on Rx characters or special condition.`
258			`*/`
259			`Write_85c30_register( ctrl, 1, 0x10 );`
260			`#endif`
261
262			`/*`
263			`* Set Write Register 15 to disable extended functions.`
264			`*/`
265
266			`Write_85c30_register( ctrl, 15, 0x00 );`
267
268			`/*`
269			`* Set the Command Register to Reset Ext/STATUS.`
270			`*/`
271			`Write_85c30_register( ctrl, 0x00, 0x10 );`
272
273			`#if CONSOLE_USE_INTERRUPTS`
274
275			`/*`
276			`* Set Write Register 1 : Base Value is 0001_0110`
277			`* Enables Rx interrupt on all characters and special conditions.`
278			`* Enables parity as a special condition.`
279			`* Enables Tx interrupt.`
280			`*/`
281			`Write_85c30_register( ctrl, 1, 0x16 );`
282
283			`/*`
284			`* Set Write Register 9 to enable all interrupt sources`
285			`* Changed from 0 to a`
286			`*/`
287			`Write_85c30_register( ctrl, 9, 0x0A );`
288
289
290			`/* XXX */`
291
292			`/*`
293			`* Issue reset highest Interrupt Under Service (IUS) command.`
294			`*/`
295			`Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 );`
296
297			`#endif`
298
299			`}`
300
301			`/* PAGE`
302			`*`
303			`* outbyte_polled_85c30`
304			`*`
305			`* This routine transmits a character using polling.`
306			`*/`
307
308			`void outbyte_polled_85c30(`
309			`volatile unsigned char csr, / IN */`
310			`char ch /* IN */`
311			`)`
312			`{`
313			`unsigned char z8530_status;`
314			`rtems_unsigned32 isrlevel;`
315
316			`rtems_interrupt_disable( isrlevel );`
317
318			`/*`
319			`* Wait for the Transmit buffer to indicate that it is empty.`
320			`*/`
321			`do {`
322			`z8530_status = Read_85c30_register( csr, STATUS_REGISTER );`
323			`} while ( !Z8530_Status_Is_TX_buffer_empty( z8530_status ) );`
324
325			`/*`
326			`* Write the character.`
327			`*/`
328			`Write_85c30_register( csr, DATA_REGISTER, (unsigned char) ch );`
329
330			`rtems_interrupt_enable( isrlevel );`
331			`}`
332
333			`/* PAGE`
334			`*`
335			`* inbyte_nonblocking_85c30`
336			`*`
337			`* This routine polls for a character.`
338			`*/`
339
340			`int inbyte_nonblocking_85c30(`
341			`const Port_85C30_info *Port`
342			`)`
343			`{`
344			`volatile unsigned char *csr;`
345			`unsigned char z8530_status;`
346			`rtems_unsigned8 data;`
347
348			`csr = Port->ctrl;`
349
350			`/*`
351			`* return -1 if a character is not available.`
352			`*/`
353			`z8530_status = Read_85c30_register( csr, STATUS_REGISTER );`
354			`if ( !Z8530_Status_Is_RX_character_available( z8530_status ) )`
355			`return -1;`
356
357			`/*`
358			`* Return the character read.`
359			`*/`
360			`data = Read_85c30_register( csr, DATA_REGISTER );`
361			`data &= Char_size_85c30[ Port->Protocol->read_char_bits ].mask_value;`
362
363			`return data;`
364			`}`
365
366
367			`/*`
368			`* Interrupt driven console IO`
369			`*/`
370
371			`#if CONSOLE_USE_INTERRUPTS`
372
373			`/*PAGE`
374			`*`
375			`* Z8530_Async_Channel_ISR`
376			`*`
377			`*/`
378			`/* RR0 */`
379
380			`rtems_isr ISR_85c30_Async(`
381			`const Port_85C30_info *Port`
382			`)`
383			`{`
384			`rtems_unsigned16 status;`
385			`volatile Console_Protocol *Protocol;`
386			`unsigned char data;`
387			`rtems_boolean did_something = FALSE;`
388
389			`Protocol = Port->Protocol;`
390
391			`status = Read_85c30_register( Port->ctrl, 0x00 );`
392
393			`/*`
394			`* Was this a RX interrupt? If so, then process it.`
395			`*/`
396
397			`if ( Z8530_Status_Is_RX_character_available( status ) ) {`
398			`data = Read_85c30_register( Port->ctrl, DATA_REGISTER );`
399			`data &= Char_size_85c30[ Port->Protocol->read_char_bits ].mask_value;`
400
401			`rtems_termios_enqueue_raw_characters( Port->Protocol->console_termios_data,`
402			`&data, 1 );`
403			`did_something = TRUE;`
404			`}`
405
406			`/*`
407			`* Was this a TX empty interrupt? If so, then process it.`
408			`*/`
409
410			`if (Z8530_Status_Is_TX_buffer_empty( status ) ) {`
411			`if ( !Ring_buffer_Is_empty( &Protocol->TX_Buffer ) ) {`
412			`Ring_buffer_Remove_character( &Protocol->TX_Buffer, data );`
413			`Write_85c30_register( Port->ctrl, DATA_REGISTER, data );`
414
415			`} else {`
416			`Protocol->Is_TX_active = FALSE;`
417			`Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x28 );`
418			`}`
419
420			`did_something = TRUE;`
421			`}`
422
423			`/*`
424			`* Issue reset highest Interrupt Under Service (IUS) command.`
425			`*/`
426
427			`/*`
428			`if ( did_something )`
429			`*/`
430			`Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 );`
431			`}`
432
433			`#endif`
434