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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [console/] [consolebsp.h] - Blame information for rev 173

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/*  consolebsp.h
 *
 *  This include file contains all console driver definations
 *
 *  COPYRIGHT (c) 1989-1997.
 *  On-Line Applications Research Corporation (OAR).
 *  Copyright assigned to U.S. Government, 1994.
 *
 *  The license and distribution terms for this file may in
 *  the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id:
 */
 
#ifndef __CONSOLEBSP_H
#define __CONSOLEBSP_H
 
#include <rtems.h>
#include <ringbuf.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
 
/*
 *
 * Note:  The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1
 *        being on the first chip, and ports 2 and 3 being on the
 *        second chip...
 */
 
 
/*
 * Z85c30 configuration informaiton.
 */
 
#if (HAS_PMC_PSC8)
#define NUM_Z85C30_CHIPS_ON_MEZZANINE  4
#else
#define NUM_Z85C30_CHIPS_ON_MEZZANINE  0
#endif
 
#define NUM_Z85C30_CHIPS       (2 + NUM_Z85C30_CHIPS_ON_MEZZANINE)
#define NUM_Z85C30_PORTS       (NUM_Z85C30_CHIPS * 2)
 
typedef enum {
  CONSOLE_x1_CLOCK,
  CONSOLE_x16_CLOCK,
  CONSOLE_x32_CLOCK,
  CONSOLE_x64_CLOCK,
} CONSOLE_Clock_speed;
 
typedef enum {
  CONSOLE_STOP_BITS_1,
  CONSOLE_STOP_BITS_1_AND_A_HALF,
  CONSOLE_STOP_BITS_2,
} CONSOLE_Stop_bits;
 
typedef enum {
  CONSOLE_PARITY_NONE,
  CONSOLE_PARITY_ODD,
  CONSOLE_PARITY_EVEN,
} CONSOLE_Parity;
 
typedef enum {
  CONSOLE_CHARACTER_BITS_8,
  CONSOLE_CHARACTER_BITS_7,
  CONSOLE_CHARACTER_BITS_6,
  CONSOLE_CHARACTER_BITS_5,
} CONSOLE_Character_bits;
 
typedef struct {
  rtems_unsigned32        baud_rate;         /* baud rate value */
  CONSOLE_Stop_bits        stop_bits;
  CONSOLE_Parity           parity;
  CONSOLE_Character_bits   read_char_bits;
  CONSOLE_Character_bits   write_char_bits;
 
#if CONSOLE_USE_INTERRUPTS
  volatile Ring_buffer_t  TX_Buffer;         /* Transmit Buffer    */
  volatile rtems_boolean  Is_TX_active;      /* Transmitting       */
  void          *console_termios_data;
#endif
 
} Console_Protocol;
 
 
/*
 * Structure used for chip level information.
 */
typedef struct {
  rtems_unsigned32       vector;
  rtems_unsigned32       clock_frequency;
  rtems_unsigned16       clock_x;
  CONSOLE_Clock_speed     clock_speed;
} Chip_85C30_info;
 
/*
 * Structure used for port level informaiton.
 */
typedef struct {
 
  volatile unsigned char    *ctrl;           /* Port Ctrl byte     */
  volatile unsigned char    *data;           /* Port data byte     */
 
  unsigned char              port;          /* Port-id / minor #  */
 
  Console_Protocol          *Protocol;
  Chip_85C30_info           *Chip;           /* Chip specific info */
 
} Port_85C30_info;
 
/*
 * Console port chip configuration tables.
 */
extern Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ];
extern const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ];
 
 
/*
 *  85c30.c prototypes.
 */
void initialize_85c30_port(
  const Port_85C30_info *Port
);
 
void outbyte_polled_85c30(
  volatile unsigned char  *csr,                     /* IN  */
  char ch
);
 
int inbyte_nonblocking_85c30(
  const Port_85C30_info      *Port
);
 
void Reset_85c30_chip(
  volatile unsigned char *ctrl_0,
  volatile unsigned char *ctrl_1
);
 
#if CONSOLE_USE_INTERRUPTS
rtems_isr ISR_85c30_Async(
   const Port_85C30_info   *Port
);
#endif
#ifdef __cplusplus
}
#endif
 
#endif

Line No.	Rev	Author	Line
1	30	unneback	`/* consolebsp.h`
2			`*`
3			`* This include file contains all console driver definations`
4			`*`
5			`* COPYRIGHT (c) 1989-1997.`
6			`* On-Line Applications Research Corporation (OAR).`
7			`* Copyright assigned to U.S. Government, 1994.`
8			`*`
9			`* The license and distribution terms for this file may in`
10			`* the file LICENSE in this distribution or at`
11			`* http://www.OARcorp.com/rtems/license.html.`
12			`*`
13			`* $Id:`
14			`*/`
15
16			`#ifndef __CONSOLEBSP_H`
17			`#define __CONSOLEBSP_H`
18
19			`#include <rtems.h>`
20			`#include <ringbuf.h>`
21
22			`#ifdef __cplusplus`
23			`extern "C" {`
24			`#endif`
25
26
27			`/*`
28			`*`
29			`* Note: The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1`
30			`* being on the first chip, and ports 2 and 3 being on the`
31			`* second chip...`
32			`*/`
33
34
35			`/*`
36			`* Z85c30 configuration informaiton.`
37			`*/`
38
39			`#if (HAS_PMC_PSC8)`
40			`#define NUM_Z85C30_CHIPS_ON_MEZZANINE 4`
41			`#else`
42			`#define NUM_Z85C30_CHIPS_ON_MEZZANINE 0`
43			`#endif`
44
45			`#define NUM_Z85C30_CHIPS (2 + NUM_Z85C30_CHIPS_ON_MEZZANINE)`
46			`#define NUM_Z85C30_PORTS (NUM_Z85C30_CHIPS * 2)`
47
48			`typedef enum {`
49			`CONSOLE_x1_CLOCK,`
50			`CONSOLE_x16_CLOCK,`
51			`CONSOLE_x32_CLOCK,`
52			`CONSOLE_x64_CLOCK,`
53			`} CONSOLE_Clock_speed;`
54
55			`typedef enum {`
56			`CONSOLE_STOP_BITS_1,`
57			`CONSOLE_STOP_BITS_1_AND_A_HALF,`
58			`CONSOLE_STOP_BITS_2,`
59			`} CONSOLE_Stop_bits;`
60
61			`typedef enum {`
62			`CONSOLE_PARITY_NONE,`
63			`CONSOLE_PARITY_ODD,`
64			`CONSOLE_PARITY_EVEN,`
65			`} CONSOLE_Parity;`
66
67			`typedef enum {`
68			`CONSOLE_CHARACTER_BITS_8,`
69			`CONSOLE_CHARACTER_BITS_7,`
70			`CONSOLE_CHARACTER_BITS_6,`
71			`CONSOLE_CHARACTER_BITS_5,`
72			`} CONSOLE_Character_bits;`
73
74			`typedef struct {`
75			`rtems_unsigned32 baud_rate; /* baud rate value */`
76			`CONSOLE_Stop_bits stop_bits;`
77			`CONSOLE_Parity parity;`
78			`CONSOLE_Character_bits read_char_bits;`
79			`CONSOLE_Character_bits write_char_bits;`
80
81			`#if CONSOLE_USE_INTERRUPTS`
82			`volatile Ring_buffer_t TX_Buffer; /* Transmit Buffer */`
83			`volatile rtems_boolean Is_TX_active; /* Transmitting */`
84			`void *console_termios_data;`
85			`#endif`
86
87			`} Console_Protocol;`
88
89
90			`/*`
91			`* Structure used for chip level information.`
92			`*/`
93			`typedef struct {`
94			`rtems_unsigned32 vector;`
95			`rtems_unsigned32 clock_frequency;`
96			`rtems_unsigned16 clock_x;`
97			`CONSOLE_Clock_speed clock_speed;`
98			`} Chip_85C30_info;`
99
100			`/*`
101			`* Structure used for port level informaiton.`
102			`*/`
103			`typedef struct {`
104
105			`volatile unsigned char ctrl; / Port Ctrl byte */`
106			`volatile unsigned char data; / Port data byte */`
107
108			`unsigned char port; /* Port-id / minor # */`
109
110			`Console_Protocol *Protocol;`
111			`Chip_85C30_info Chip; / Chip specific info */`
112
113			`} Port_85C30_info;`
114
115			`/*`
116			`* Console port chip configuration tables.`
117			`*/`
118			`extern Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ];`
119			`extern const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ];`
120
121
122			`/*`
123			`* 85c30.c prototypes.`
124			`*/`
125			`void initialize_85c30_port(`
126			`const Port_85C30_info *Port`
127			`);`
128
129			`void outbyte_polled_85c30(`
130			`volatile unsigned char csr, / IN */`
131			`char ch`
132			`);`
133
134			`int inbyte_nonblocking_85c30(`
135			`const Port_85C30_info *Port`
136			`);`
137
138			`void Reset_85c30_chip(`
139			`volatile unsigned char *ctrl_0,`
140			`volatile unsigned char *ctrl_1`
141			`);`
142
143			`#if CONSOLE_USE_INTERRUPTS`
144			`rtems_isr ISR_85c30_Async(`
145			`const Port_85C30_info *Port`
146			`);`
147			`#endif`
148			`#ifdef __cplusplus`
149			`}`
150			`#endif`
151
152			`#endif`

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [console/] [consolebsp.h] - Blame information for rev 173