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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [console/] [consolebsp.h] - Blame information for rev 30

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/*  consolebsp.h
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 *
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 *  This include file contains all console driver definations
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 *
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 *  COPYRIGHT (c) 1989-1997.
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 *  On-Line Applications Research Corporation (OAR).
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 *  Copyright assigned to U.S. Government, 1994.
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 *
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 *  The license and distribution terms for this file may in
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 *  the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id:
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 */
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#ifndef __CONSOLEBSP_H
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#define __CONSOLEBSP_H
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#include <rtems.h>
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#include <ringbuf.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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 *
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 * Note:  The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1
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 *        being on the first chip, and ports 2 and 3 being on the
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 *        second chip...
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 */
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/*
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 * Z85c30 configuration informaiton.
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 */
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#if (HAS_PMC_PSC8)
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#define NUM_Z85C30_CHIPS_ON_MEZZANINE  4
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#else
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#define NUM_Z85C30_CHIPS_ON_MEZZANINE  0
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#endif
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#define NUM_Z85C30_CHIPS       (2 + NUM_Z85C30_CHIPS_ON_MEZZANINE)
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#define NUM_Z85C30_PORTS       (NUM_Z85C30_CHIPS * 2)
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typedef enum {
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  CONSOLE_x1_CLOCK,
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  CONSOLE_x16_CLOCK,
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  CONSOLE_x32_CLOCK,
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  CONSOLE_x64_CLOCK,
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} CONSOLE_Clock_speed;
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typedef enum {
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  CONSOLE_STOP_BITS_1,
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  CONSOLE_STOP_BITS_1_AND_A_HALF,
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  CONSOLE_STOP_BITS_2,
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} CONSOLE_Stop_bits;
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typedef enum {
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  CONSOLE_PARITY_NONE,
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  CONSOLE_PARITY_ODD,
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  CONSOLE_PARITY_EVEN,
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} CONSOLE_Parity;
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typedef enum {
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  CONSOLE_CHARACTER_BITS_8,
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  CONSOLE_CHARACTER_BITS_7,
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  CONSOLE_CHARACTER_BITS_6,
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  CONSOLE_CHARACTER_BITS_5,
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} CONSOLE_Character_bits;
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typedef struct {
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  rtems_unsigned32        baud_rate;         /* baud rate value */
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  CONSOLE_Stop_bits        stop_bits;
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  CONSOLE_Parity           parity;
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  CONSOLE_Character_bits   read_char_bits;
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  CONSOLE_Character_bits   write_char_bits;
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#if CONSOLE_USE_INTERRUPTS
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  volatile Ring_buffer_t  TX_Buffer;         /* Transmit Buffer    */
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  volatile rtems_boolean  Is_TX_active;      /* Transmitting       */
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  void          *console_termios_data;
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#endif
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} Console_Protocol;
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/*
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 * Structure used for chip level information.
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 */
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typedef struct {
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  rtems_unsigned32       vector;
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  rtems_unsigned32       clock_frequency;
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  rtems_unsigned16       clock_x;
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  CONSOLE_Clock_speed     clock_speed;
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} Chip_85C30_info;
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/*
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 * Structure used for port level informaiton.
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 */
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typedef struct {
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  volatile unsigned char    *ctrl;           /* Port Ctrl byte     */
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  volatile unsigned char    *data;           /* Port data byte     */
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  unsigned char              port;          /* Port-id / minor #  */
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  Console_Protocol          *Protocol;
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  Chip_85C30_info           *Chip;           /* Chip specific info */
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} Port_85C30_info;
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/*
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 * Console port chip configuration tables.
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 */
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extern Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ];
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extern const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ];
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/*
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 *  85c30.c prototypes.
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 */
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void initialize_85c30_port(
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  const Port_85C30_info *Port
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);
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void outbyte_polled_85c30(
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  volatile unsigned char  *csr,                     /* IN  */
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  char ch
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);
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int inbyte_nonblocking_85c30(
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  const Port_85C30_info      *Port
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);
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void Reset_85c30_chip(
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  volatile unsigned char *ctrl_0,
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  volatile unsigned char *ctrl_1
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);
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#if CONSOLE_USE_INTERRUPTS
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rtems_isr ISR_85c30_Async(
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   const Port_85C30_info   *Port
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);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif

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