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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [console/] [tbl85c30.c] - Blame information for rev 846

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 /*
 *  This file contains the table for the z85c30 port
 *  used by the console driver.
 *
 *  COPYRIGHT (c) 1989-1997.
 *  On-Line Applications Research Corporation (OAR).
 *  Copyright assigned to U.S. Government, 1994.
 *
 *  The license and distribution terms for this file may be
 *  found in the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id:
 */
 
#include "consolebsp.h"
#include <bsp.h>
 
#define CONSOLE_DEFAULT_BAUD_RATE            9600
#define CONSOLE_DEFAULT_BAUD_CONSTANT        Score603e_Z8530_Chip0_Baud(9600)
 
#define CONSOLE_DEFAULT_STOP_BITS            CONSOLE_STOP_BITS_1    
#define CONSOLE_DEFAULT_PARITY               CONSOLE_PARITY_NONE          
#define CONSOLE_DEFAULT_READ_CHARACTER_BITS  CONSOLE_CHARACTER_BITS_8
#define CONSOLE_DEFAULT_WRITE_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8
#define CONSOLE_DEFAULT_CONSOLE_CLOCK        CONSOLE_x16_CLOCK
 
 
#define DEFAULT_PROTOCOL  { CONSOLE_DEFAULT_BAUD_RATE,              \
                            CONSOLE_DEFAULT_STOP_BITS,              \
                            CONSOLE_DEFAULT_PARITY,                 \
                            CONSOLE_DEFAULT_READ_CHARACTER_BITS,    \
                            CONSOLE_DEFAULT_WRITE_CHARACTER_BITS }
 
/*
 * Tables of information necessary to use the console 85c30 routines.
 */
Console_Protocol Protocols_85c30 [ NUM_Z85C30_PORTS ] =
{
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
 
#if (HAS_PMC_PSC8)
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
  DEFAULT_PROTOCOL,
#endif
};
 
/*
 * Table of chip unique information for each chip.
 * See consolebsp.h for the Chip_85C30_info structure defination.
 */
Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] =
{
  {
    SCORE603E_85C30_0_IRQ,
    SCORE603E_85C30_0_CLOCK,
    SCORE603E_85C30_0_CLOCK_X,
    CONSOLE_DEFAULT_CONSOLE_CLOCK
  },
  {
    SCORE603E_85C30_1_IRQ,
    SCORE603E_85C30_1_CLOCK,
    SCORE603E_85C30_1_CLOCK_X,
    CONSOLE_DEFAULT_CONSOLE_CLOCK
  },
 
#if (HAS_PMC_PSC8)
  {
    SCORE603E_85C30_2_IRQ,
    SCORE603E_85C30_2_CLOCK,
    SCORE603E_85C30_2_CLOCK_X,
    CONSOLE_DEFAULT_CONSOLE_CLOCK
  },
  {
    SCORE603E_85C30_3_IRQ,
    SCORE603E_85C30_3_CLOCK,
    SCORE603E_85C30_3_CLOCK_X,
    CONSOLE_DEFAULT_CONSOLE_CLOCK
  },
  {
    SCORE603E_85C30_4_IRQ,
    SCORE603E_85C30_4_CLOCK,
    SCORE603E_85C30_4_CLOCK_X,
    CONSOLE_DEFAULT_CONSOLE_CLOCK
  },
  {
    SCORE603E_85C30_5_IRQ,
    SCORE603E_85C30_5_CLOCK,
    SCORE603E_85C30_5_CLOCK_X,
    CONSOLE_DEFAULT_CONSOLE_CLOCK
  },
#endif
 
};
 
/*
 * Table of port unique information for each port.
 * See consolebsp.h for the Port_85C30_info structure defination.
 */
const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ] = {
  {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_0,
    (volatile unsigned char *) SCORE603E_85C30_DATA_0,
    0x00,
    &Protocols_85c30[0],
    &Chips_85C30[0],
  },
  {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_1,
    (volatile unsigned char *) SCORE603E_85C30_DATA_1,
    0x01,
    &Protocols_85c30[1],
    &Chips_85C30[0],
  },
  {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_2,
    (volatile unsigned char *) SCORE603E_85C30_DATA_2,
    0x02,
    &Protocols_85c30[2],
    &Chips_85C30[1],
  },
  {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_3,
    (volatile unsigned char *) SCORE603E_85C30_DATA_3,
    0x03,
    &Protocols_85c30[3],
    &Chips_85C30[1],
 },
 
#if (HAS_PMC_PSC8)
  {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_4,
    (volatile unsigned char *) SCORE603E_85C30_DATA_4,
    0x04,
    &Protocols_85c30[4],
    &Chips_85C30[2],
 },
 {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_5,
    (volatile unsigned char *) SCORE603E_85C30_DATA_5,
    0x05,
    &Protocols_85c30[5],
    &Chips_85C30[2],
 },
 {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_6,
    (volatile unsigned char *) SCORE603E_85C30_DATA_6,
    0x06,
    &Protocols_85c30[6],
    &Chips_85C30[3],
 },
 {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_7,
    (volatile unsigned char *) SCORE603E_85C30_DATA_7,
    0x07,
    &Protocols_85c30[7],
    &Chips_85C30[3],
 },
 {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_8,
    (volatile unsigned char *) SCORE603E_85C30_DATA_8,
    0x08,
    &Protocols_85c30[8],
    &Chips_85C30[4],
 },
 {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_9,
    (volatile unsigned char *) SCORE603E_85C30_DATA_9,
    0x09,
    &Protocols_85c30[9],
    &Chips_85C30[4],
 },
 {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_10,
    (volatile unsigned char *) SCORE603E_85C30_DATA_10,
    0x0a,
    &Protocols_85c30[10],
    &Chips_85C30[5],
 },
 {
    (volatile unsigned char *) SCORE603E_85C30_CTRL_11,
    (volatile unsigned char *) SCORE603E_85C30_DATA_11,
    0x0b,
    &Protocols_85c30[11],
    &Chips_85C30[5],
 },
#endif
};
 

Line No.	Rev	Author	Line
1	30	unneback	`/*`
2			`* This file contains the table for the z85c30 port`
3			`* used by the console driver.`
4			`*`
5			`* COPYRIGHT (c) 1989-1997.`
6			`* On-Line Applications Research Corporation (OAR).`
7			`* Copyright assigned to U.S. Government, 1994.`
8			`*`
9			`* The license and distribution terms for this file may be`
10			`* found in the file LICENSE in this distribution or at`
11			`* http://www.OARcorp.com/rtems/license.html.`
12			`*`
13			`* $Id:`
14			`*/`
15
16			`#include "consolebsp.h"`
17			`#include <bsp.h>`
18
19			`#define CONSOLE_DEFAULT_BAUD_RATE 9600`
20			`#define CONSOLE_DEFAULT_BAUD_CONSTANT Score603e_Z8530_Chip0_Baud(9600)`
21
22			`#define CONSOLE_DEFAULT_STOP_BITS CONSOLE_STOP_BITS_1`
23			`#define CONSOLE_DEFAULT_PARITY CONSOLE_PARITY_NONE`
24			`#define CONSOLE_DEFAULT_READ_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8`
25			`#define CONSOLE_DEFAULT_WRITE_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8`
26			`#define CONSOLE_DEFAULT_CONSOLE_CLOCK CONSOLE_x16_CLOCK`
27
28
29			`#define DEFAULT_PROTOCOL { CONSOLE_DEFAULT_BAUD_RATE, \`
30			`CONSOLE_DEFAULT_STOP_BITS, \`
31			`CONSOLE_DEFAULT_PARITY, \`
32			`CONSOLE_DEFAULT_READ_CHARACTER_BITS, \`
33			`CONSOLE_DEFAULT_WRITE_CHARACTER_BITS }`
34
35			`/*`
36			`* Tables of information necessary to use the console 85c30 routines.`
37			`*/`
38			`Console_Protocol Protocols_85c30 [ NUM_Z85C30_PORTS ] =`
39			`{`
40			`DEFAULT_PROTOCOL,`
41			`DEFAULT_PROTOCOL,`
42			`DEFAULT_PROTOCOL,`
43			`DEFAULT_PROTOCOL,`
44
45			`#if (HAS_PMC_PSC8)`
46			`DEFAULT_PROTOCOL,`
47			`DEFAULT_PROTOCOL,`
48			`DEFAULT_PROTOCOL,`
49			`DEFAULT_PROTOCOL,`
50			`DEFAULT_PROTOCOL,`
51			`DEFAULT_PROTOCOL,`
52			`DEFAULT_PROTOCOL,`
53			`DEFAULT_PROTOCOL,`
54			`#endif`
55			`};`
56
57			`/*`
58			`* Table of chip unique information for each chip.`
59			`* See consolebsp.h for the Chip_85C30_info structure defination.`
60			`*/`
61			`Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] =`
62			`{`
63			`{`
64			`SCORE603E_85C30_0_IRQ,`
65			`SCORE603E_85C30_0_CLOCK,`
66			`SCORE603E_85C30_0_CLOCK_X,`
67			`CONSOLE_DEFAULT_CONSOLE_CLOCK`
68			`},`
69			`{`
70			`SCORE603E_85C30_1_IRQ,`
71			`SCORE603E_85C30_1_CLOCK,`
72			`SCORE603E_85C30_1_CLOCK_X,`
73			`CONSOLE_DEFAULT_CONSOLE_CLOCK`
74			`},`
75
76			`#if (HAS_PMC_PSC8)`
77			`{`
78			`SCORE603E_85C30_2_IRQ,`
79			`SCORE603E_85C30_2_CLOCK,`
80			`SCORE603E_85C30_2_CLOCK_X,`
81			`CONSOLE_DEFAULT_CONSOLE_CLOCK`
82			`},`
83			`{`
84			`SCORE603E_85C30_3_IRQ,`
85			`SCORE603E_85C30_3_CLOCK,`
86			`SCORE603E_85C30_3_CLOCK_X,`
87			`CONSOLE_DEFAULT_CONSOLE_CLOCK`
88			`},`
89			`{`
90			`SCORE603E_85C30_4_IRQ,`
91			`SCORE603E_85C30_4_CLOCK,`
92			`SCORE603E_85C30_4_CLOCK_X,`
93			`CONSOLE_DEFAULT_CONSOLE_CLOCK`
94			`},`
95			`{`
96			`SCORE603E_85C30_5_IRQ,`
97			`SCORE603E_85C30_5_CLOCK,`
98			`SCORE603E_85C30_5_CLOCK_X,`
99			`CONSOLE_DEFAULT_CONSOLE_CLOCK`
100			`},`
101			`#endif`
102
103			`};`
104
105			`/*`
106			`* Table of port unique information for each port.`
107			`* See consolebsp.h for the Port_85C30_info structure defination.`
108			`*/`
109			`const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ] = {`
110			`{`
111			`(volatile unsigned char *) SCORE603E_85C30_CTRL_0,`
112			`(volatile unsigned char *) SCORE603E_85C30_DATA_0,`
113			`0x00,`
114			`&Protocols_85c30[0],`
115			`&Chips_85C30[0],`
116			`},`
117			`{`
118			`(volatile unsigned char *) SCORE603E_85C30_CTRL_1,`
119			`(volatile unsigned char *) SCORE603E_85C30_DATA_1,`
120			`0x01,`
121			`&Protocols_85c30[1],`
122			`&Chips_85C30[0],`
123			`},`
124			`{`
125			`(volatile unsigned char *) SCORE603E_85C30_CTRL_2,`
126			`(volatile unsigned char *) SCORE603E_85C30_DATA_2,`
127			`0x02,`
128			`&Protocols_85c30[2],`
129			`&Chips_85C30[1],`
130			`},`
131			`{`
132			`(volatile unsigned char *) SCORE603E_85C30_CTRL_3,`
133			`(volatile unsigned char *) SCORE603E_85C30_DATA_3,`
134			`0x03,`
135			`&Protocols_85c30[3],`
136			`&Chips_85C30[1],`
137			`},`
138
139			`#if (HAS_PMC_PSC8)`
140			`{`
141			`(volatile unsigned char *) SCORE603E_85C30_CTRL_4,`
142			`(volatile unsigned char *) SCORE603E_85C30_DATA_4,`
143			`0x04,`
144			`&Protocols_85c30[4],`
145			`&Chips_85C30[2],`
146			`},`
147			`{`
148			`(volatile unsigned char *) SCORE603E_85C30_CTRL_5,`
149			`(volatile unsigned char *) SCORE603E_85C30_DATA_5,`
150			`0x05,`
151			`&Protocols_85c30[5],`
152			`&Chips_85C30[2],`
153			`},`
154			`{`
155			`(volatile unsigned char *) SCORE603E_85C30_CTRL_6,`
156			`(volatile unsigned char *) SCORE603E_85C30_DATA_6,`
157			`0x06,`
158			`&Protocols_85c30[6],`
159			`&Chips_85C30[3],`
160			`},`
161			`{`
162			`(volatile unsigned char *) SCORE603E_85C30_CTRL_7,`
163			`(volatile unsigned char *) SCORE603E_85C30_DATA_7,`
164			`0x07,`
165			`&Protocols_85c30[7],`
166			`&Chips_85C30[3],`
167			`},`
168			`{`
169			`(volatile unsigned char *) SCORE603E_85C30_CTRL_8,`
170			`(volatile unsigned char *) SCORE603E_85C30_DATA_8,`
171			`0x08,`
172			`&Protocols_85c30[8],`
173			`&Chips_85C30[4],`
174			`},`
175			`{`
176			`(volatile unsigned char *) SCORE603E_85C30_CTRL_9,`
177			`(volatile unsigned char *) SCORE603E_85C30_DATA_9,`
178			`0x09,`
179			`&Protocols_85c30[9],`
180			`&Chips_85C30[4],`
181			`},`
182			`{`
183			`(volatile unsigned char *) SCORE603E_85C30_CTRL_10,`
184			`(volatile unsigned char *) SCORE603E_85C30_DATA_10,`
185			`0x0a,`
186			`&Protocols_85c30[10],`
187			`&Chips_85C30[5],`
188			`},`
189			`{`
190			`(volatile unsigned char *) SCORE603E_85C30_CTRL_11,`
191			`(volatile unsigned char *) SCORE603E_85C30_DATA_11,`
192			`0x0b,`
193			`&Protocols_85c30[11],`
194			`&Chips_85C30[5],`
195			`},`
196			`#endif`
197			`};`
198

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [console/] [tbl85c30.c] - Blame information for rev 846