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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [include/] [bsp.h] - Blame information for rev 173

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/*  bsp.h
 *
 *  This include file contains all board IO definitions.
 *
 *  COPYRIGHT (c) 1989-1997.
 *  On-Line Applications Research Corporation (OAR).
 *  Copyright assigned to U.S. Government, 1994.
 *
 *  The license and distribution terms for this file may in
 *  the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id: bsp.h,v 1.2 2001-09-27 12:01:03 chris Exp $
 */
 
#ifndef __BSP_h
#define __BSP_h
 
#ifdef __cplusplus
extern "C" {
#endif
 
/*
 *  confdefs.h overrides for this BSP:
 *   - termios serial ports (defaults to 1)
 *   - Interrupt stack space is not minimum if defined.
 */
 
#if (HAS_PMC_PSC8)
#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
#else
#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
#endif
#define CONFIGURE_INTERRUPT_STACK_MEMORY  (12 * 1024)
 
#ifdef ASM
/* Definition of where to store registers in alignment handler */
#define ALIGN_REGS 0x0140
 
#else
#include <rtems.h>
#include <console.h>
#include <clockdrv.h>
#include <iosupp.h>
 
 
#if (SCORE603E_GENERATION == 1)
#include <gen1.h>
#elif (SCORE603E_GENERATION == 2)
#include <gen2.h>
#else
#error "Unknown Generation of  Score603e"
#endif
 
 
/*
 * The following macro calculates the Baud constant. For the Z8530 chip.
 *
 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
 */
#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
 
#define Score603e_Z8530_Chip1_Baud( _value ) \
  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
     SCORE603E_85C30_1_CLOCK_X, _value )
 
#define Score603e_Z8530_Chip0_Baud( _value ) \
  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
     SCORE603E_85C30_0_CLOCK_X, _value )
 
#define Initialize_Board_ctrl_register()                         \
  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
                               SCORE603E_BRD_FLASH_DISABLE_MASK) \
 
/*
 *  Define the time limits for RTEMS Test Suite test durations.
 *  Long test and short test duration limits are provided.  These
 *  values are in seconds and need to be converted to ticks for the
 *  application.
 *
 */
 
#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
 
/*
 *  Stuff for Time Test 27
 */
 
#define MUST_WAIT_FOR_INTERRUPT 1
 
#define Install_tm27_vector( _handler ) \
  set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 )
 
#define Cause_tm27_intr()  \
  do { \
    unsigned32 _clicks = 8; \
    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
  } while (0)
 
 
#define Clear_tm27_intr() \
  do { \
    unsigned32 _clicks = 0xffffffff; \
    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
  } while (0)
 
#define Lower_tm27_intr() \
  do { \
    unsigned32 _msr = 0; \
    _ISR_Set_level( 0 ); \
    asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
    _msr |=  0x8002; \
    asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
  } while (0)
 
 
/* Constants */
 
/*
 *  Device Driver Table Entries
 */
 
/*
 * NOTE: Use the standard Console driver entry
 */
 
/*
 * NOTE: Use the standard Clock driver entry
 */
 
 
/*
 *  Information placed in the linkcmds file.
 */
 
extern int   RAM_START;
extern int   RAM_END;
extern int   RAM_SIZE;
 
extern int   PROM_START;
extern int   PROM_END;
extern int   PROM_SIZE;
 
extern int   CLOCK_SPEED;
extern int   CPU_PPC_CLICKS_PER_MS;
 
extern int   end;        /* last address in the program */
 
/*
 * How many libio files we want
 */
 
#define BSP_LIBIO_MAX_FDS       20
 
/* functions */
 
void bsp_start( void );
 
void bsp_cleanup( void );
 
rtems_isr_entry set_vector(                    /* returns old vector */
  rtems_isr_entry     handler,                  /* isr routine        */
  rtems_vector_number vector,                   /* vector number      */
  int                 type                      /* RTEMS or RAW intr  */
);
 
/*
 * spurious.c
 */
rtems_isr bsp_stub_handler(
   rtems_vector_number trap
);
rtems_isr bsp_spurious_handler(
   rtems_vector_number trap
);
void bsp_spurious_initialize();
 
/*
 * genvec.c
 */
rtems_isr_entry  set_EE_vector(
  rtems_isr_entry     handler,                  /* isr routine        */
  rtems_vector_number vector                    /* vector number      */
);
void initialize_external_exception_vector ();
 
/*
 * console.c
 */
void DEBUG_puts( char *string );
 
void BSP_fatal_return( void );
 
/*
 * Hwr_init.c
 */
void init_PCI();
void instruction_cache_enable ();
void data_cache_enable ();
 
 
void initialize_PCI_bridge ();
rtems_unsigned16 read_and_clear_irq ();
void set_irq_mask(
  rtems_unsigned16 value
);
rtems_unsigned16 get_irq_mask();
 
/*
 * universe.c
 */
void initialize_universe();
 
void set_irq_mask(
  rtems_unsigned16 value
);
 
rtems_unsigned16 get_irq_mask();
 
void unmask_irq(
  rtems_unsigned16 irq_idx
);
 
void init_irq_data_register();
 
rtems_unsigned16 read_and_clear_PMC_irq(
  rtems_unsigned16    irq
);
 
rtems_boolean Is_PMC_IRQ(
  rtems_unsigned32   pmc_irq,
  rtems_unsigned16   status_word
);
 
rtems_unsigned16 read_and_clear_irq();
 
/*
 * FPGA.c
 */
void initialize_PCI_bridge ();
 
/* flash.c */
 
unsigned int SCORE603e_FLASH_Disable(
  rtems_unsigned32               unused
);
unsigned int SCORE603e_FLASH_verify_enable();
unsigned int SCORE603e_FLASH_Enable_writes(
  rtems_unsigned32               area        /* Unused  */
);
 
#define Convert_Endian_32( _data ) \
  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
 
#define Convert_Endian_16( _data ) \
  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
 
extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
extern rtems_unsigned32          bsp_isr_level;
 
#endif /* ASM */
 
#ifdef __cplusplus
}
#endif
 
#endif
/* end of include file */
 

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [include/] [bsp.h] - Blame information for rev 173

Line No.	Rev	Author	Line
1	30	unneback	`/* bsp.h`
2			`*`
3			`* This include file contains all board IO definitions.`
4			`*`
5			`* COPYRIGHT (c) 1989-1997.`
6			`* On-Line Applications Research Corporation (OAR).`
7			`* Copyright assigned to U.S. Government, 1994.`
8			`*`
9			`* The license and distribution terms for this file may in`
10			`* the file LICENSE in this distribution or at`
11			`* http://www.OARcorp.com/rtems/license.html.`
12			`*`
13			`* $Id: bsp.h,v 1.2 2001-09-27 12:01:03 chris Exp $`
14			`*/`
15
16			`#ifndef __BSP_h`
17			`#define __BSP_h`
18
19			`#ifdef __cplusplus`
20			`extern "C" {`
21			`#endif`
22
23			`/*`
24			`* confdefs.h overrides for this BSP:`
25			`* - termios serial ports (defaults to 1)`
26			`* - Interrupt stack space is not minimum if defined.`
27			`*/`
28
29			`#if (HAS_PMC_PSC8)`
30			`#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)`
31			`#else`
32			`#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)`
33			`#endif`
34			`#define CONFIGURE_INTERRUPT_STACK_MEMORY (12 * 1024)`
35
36			`#ifdef ASM`
37			`/* Definition of where to store registers in alignment handler */`
38			`#define ALIGN_REGS 0x0140`
39
40			`#else`
41			`#include <rtems.h>`
42			`#include <console.h>`
43			`#include <clockdrv.h>`
44			`#include <iosupp.h>`
45
46
47			`#if (SCORE603E_GENERATION == 1)`
48			`#include <gen1.h>`
49			`#elif (SCORE603E_GENERATION == 2)`
50			`#include <gen2.h>`
51			`#else`
52			`#error "Unknown Generation of Score603e"`
53			`#endif`
54
55
56			`/*`
57			`* The following macro calculates the Baud constant. For the Z8530 chip.`
58			`*`
59			`* Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2`
60			`* for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2`
61			`*/`
62			`#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate ) \`
63			`( (_frequency /( _clock_by * 2 * _baud_rate)) - 2)`
64
65			`#define Score603e_Z8530_Chip1_Baud( _value ) \`
66			`_Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \`
67			`SCORE603E_85C30_1_CLOCK_X, _value )`
68
69			`#define Score603e_Z8530_Chip0_Baud( _value ) \`
70			`_Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \`
71			`SCORE603E_85C30_0_CLOCK_X, _value )`
72
73			`#define Initialize_Board_ctrl_register() \`
74			`SCORE603E_BOARD_CTRL_REG = (SCORE603E_BOARD_CTRL_REG \| \`
75			`SCORE603E_BRD_FLASH_DISABLE_MASK) \`
76
77			`/*`
78			`* Define the time limits for RTEMS Test Suite test durations.`
79			`* Long test and short test duration limits are provided. These`
80			`* values are in seconds and need to be converted to ticks for the`
81			`* application.`
82			`*`
83			`*/`
84
85			`#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */`
86			`#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */`
87
88			`/*`
89			`* Stuff for Time Test 27`
90			`*/`
91
92			`#define MUST_WAIT_FOR_INTERRUPT 1`
93
94			`#define Install_tm27_vector( _handler ) \`
95			`set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 )`
96
97			`#define Cause_tm27_intr() \`
98			`do { \`
99			`unsigned32 _clicks = 8; \`
100			`asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \`
101			`} while (0)`
102
103
104			`#define Clear_tm27_intr() \`
105			`do { \`
106			`unsigned32 _clicks = 0xffffffff; \`
107			`asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \`
108			`} while (0)`
109
110			`#define Lower_tm27_intr() \`
111			`do { \`
112			`unsigned32 _msr = 0; \`
113			`_ISR_Set_level( 0 ); \`
114			`asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \`
115			`_msr \|= 0x8002; \`
116			`asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \`
117			`} while (0)`
118
119
120			`/* Constants */`
121
122			`/*`
123			`* Device Driver Table Entries`
124			`*/`
125
126			`/*`
127			`* NOTE: Use the standard Console driver entry`
128			`*/`
129
130			`/*`
131			`* NOTE: Use the standard Clock driver entry`
132			`*/`
133
134
135			`/*`
136			`* Information placed in the linkcmds file.`
137			`*/`
138
139			`extern int RAM_START;`
140			`extern int RAM_END;`
141			`extern int RAM_SIZE;`
142
143			`extern int PROM_START;`
144			`extern int PROM_END;`
145			`extern int PROM_SIZE;`
146
147			`extern int CLOCK_SPEED;`
148			`extern int CPU_PPC_CLICKS_PER_MS;`
149
150			`extern int end; /* last address in the program */`
151
152			`/*`
153			`* How many libio files we want`
154			`*/`
155
156			`#define BSP_LIBIO_MAX_FDS 20`
157
158			`/* functions */`
159
160			`void bsp_start( void );`
161
162			`void bsp_cleanup( void );`
163
164			`rtems_isr_entry set_vector( /* returns old vector */`
165			`rtems_isr_entry handler, /* isr routine */`
166			`rtems_vector_number vector, /* vector number */`
167			`int type /* RTEMS or RAW intr */`
168			`);`
169
170			`/*`
171			`* spurious.c`
172			`*/`
173			`rtems_isr bsp_stub_handler(`
174			`rtems_vector_number trap`
175			`);`
176			`rtems_isr bsp_spurious_handler(`
177			`rtems_vector_number trap`
178			`);`
179			`void bsp_spurious_initialize();`
180
181			`/*`
182			`* genvec.c`
183			`*/`
184			`rtems_isr_entry set_EE_vector(`
185			`rtems_isr_entry handler, /* isr routine */`
186			`rtems_vector_number vector /* vector number */`
187			`);`
188			`void initialize_external_exception_vector ();`
189
190			`/*`
191			`* console.c`
192			`*/`
193			`void DEBUG_puts( char *string );`
194
195			`void BSP_fatal_return( void );`
196
197			`/*`
198			`* Hwr_init.c`
199			`*/`
200			`void init_PCI();`
201			`void instruction_cache_enable ();`
202			`void data_cache_enable ();`
203
204
205			`void initialize_PCI_bridge ();`
206			`rtems_unsigned16 read_and_clear_irq ();`
207			`void set_irq_mask(`
208			`rtems_unsigned16 value`
209			`);`
210			`rtems_unsigned16 get_irq_mask();`
211
212			`/*`
213			`* universe.c`
214			`*/`
215			`void initialize_universe();`
216
217			`void set_irq_mask(`
218			`rtems_unsigned16 value`
219			`);`
220
221			`rtems_unsigned16 get_irq_mask();`
222
223			`void unmask_irq(`
224			`rtems_unsigned16 irq_idx`
225			`);`
226
227			`void init_irq_data_register();`
228
229			`rtems_unsigned16 read_and_clear_PMC_irq(`
230			`rtems_unsigned16 irq`
231			`);`
232
233			`rtems_boolean Is_PMC_IRQ(`
234			`rtems_unsigned32 pmc_irq,`
235			`rtems_unsigned16 status_word`
236			`);`
237
238			`rtems_unsigned16 read_and_clear_irq();`
239
240			`/*`
241			`* FPGA.c`
242			`*/`
243			`void initialize_PCI_bridge ();`
244
245			`/* flash.c */`
246
247			`unsigned int SCORE603e_FLASH_Disable(`
248			`rtems_unsigned32 unused`
249			`);`
250			`unsigned int SCORE603e_FLASH_verify_enable();`
251			`unsigned int SCORE603e_FLASH_Enable_writes(`
252			`rtems_unsigned32 area /* Unused */`
253			`);`
254
255			`#define Convert_Endian_32( _data ) \`
256			`( ((_data&0x000000ff)<<24) \| ((_data&0x0000ff00)<<8) \| \`
257			`((_data&0x00ff0000)>>8) \| ((_data&0xff000000)>>24) )`
258
259			`#define Convert_Endian_16( _data ) \`
260			`( ((_data&0x00ff)<<8) \| ((_data&0xff00)>>8) )`
261
262			`extern rtems_configuration_table BSP_Configuration; /* owned by BSP */`
263			`extern rtems_cpu_table Cpu_table; /* owned by BSP */`
264			`extern rtems_unsigned32 bsp_isr_level;`
265
266			`#endif /* ASM */`
267
268			`#ifdef __cplusplus`
269			`}`
270			`#endif`
271
272			`#endif`
273			`/* end of include file */`
274