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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [startup/] [FPGA.c] - Blame information for rev 173

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/*  FPGA.c
 *
 *  COPYRIGHT (c) 1989-1997.
 *  On-Line Applications Research Corporation (OAR).
 *  Copyright assigned to U.S. Government, 1994.
 *
 *  The license and distribution terms for this file may in
 *  the file LICENSE in this distribution or at
 *  http://www.OARcorp.com/rtems/license.html.
 *
 *  $Id:
 */
 
#include <bsp.h>
#if (SCORE603E_GENERATION == 2)
#include <rtems/libio.h>
 
#include <libcsupport.h>
 
#include <string.h>
#include <fcntl.h>
#include <assert.h>
 
/*
 *  initialize FPGA
 */
void initialize_PCI_bridge ()
{
#if (!SCORE603E_USE_DINK)
  rtems_unsigned16 mask, shift, data;
 
  shift = SCORE603E_85C30_0_IRQ - Score_IRQ_First;
  mask = 1 << shift;
 
  shift = SCORE603E_85C30_1_IRQ - Score_IRQ_First;
  mask  = mask & (1 << shift);
 
  data = *SCORE603E_FPGA_MASK_DATA;
  data = ~mask;
 
  *SCORE603E_FPGA_MASK_DATA = data;
#endif
 
}
 
void set_irq_mask(
  rtems_unsigned16 value
)
{
  rtems_unsigned16  *loc;
 
  loc = (rtems_unsigned16  *)SCORE603E_FPGA_MASK_DATA;
 
  *loc = value;
}
 
rtems_unsigned16 get_irq_mask()
{
  rtems_unsigned16  *loc;
  rtems_unsigned16  value;
 
  loc =  (rtems_unsigned16  *)SCORE603E_FPGA_MASK_DATA;
 
  value = *loc;
 
  return value;
}
 
void unmask_irq(
  rtems_unsigned16 irq_idx
)
{
  rtems_unsigned16 value;
  rtems_unsigned32 mask_idx = irq_idx;
 
  value = get_irq_mask();
 
#if (HAS_PMC_PSC8)
  switch (irq_idx + Score_IRQ_First ) {
    case SCORE603E_85C30_4_IRQ:
    case SCORE603E_85C30_2_IRQ:
    case SCORE603E_85C30_5_IRQ:
    case SCORE603E_85C30_3_IRQ:
      mask_idx = SCORE603E_PCI_IRQ_0 - Score_IRQ_First;
      break;
    default:
      break;
  }
#endif
 
  value &= (~(0x1 << mask_idx));
  set_irq_mask( value );
}
 
 
void init_irq_data_register()
{
  rtems_unsigned32 index;
  rtems_unsigned32 i;
 
#if (SCORE603E_USE_DINK)
  set_irq_mask( 0xffff );
#endif
 
  /*
   * Clear any existing interupts from the vector data register.
   */
  for (i=0; i<20; i++) {
    index =  (*SCORE603E_FPGA_VECT_DATA);
    if ( (index&0x10) != 0x10 )
      break;
  }
}
 
rtems_unsigned16 read_and_clear_PMC_irq(
  rtems_unsigned16    irq
)
{
  rtems_unsigned16    status_word = irq;
 
  status_word = (*SCORE603E_PMC_STATUS_ADDRESS);
 
  return status_word;
}
 
rtems_boolean Is_PMC_IRQ(
  rtems_unsigned32   pmc_irq,
  rtems_unsigned16   status_word
)
{
  rtems_boolean   result= FALSE;
 
  switch(pmc_irq) {
    case SCORE603E_85C30_4_IRQ:
      result = Is_PMC_85C30_4_IRQ( status_word );
      break;
    case SCORE603E_85C30_2_IRQ:
      result = Is_PMC_85C30_2_IRQ( status_word );
      break;
    case SCORE603E_85C30_5_IRQ:
      result = Is_PMC_85C30_5_IRQ( status_word );
      break;
    case SCORE603E_85C30_3_IRQ:
      result = Is_PMC_85C30_3_IRQ( status_word );
      break;
    default:
      assert( 0 );
      break;
  }
 
  return result;
}
 
rtems_unsigned16 read_and_clear_irq()
{
  rtems_unsigned16    irq;
 
  irq = (*SCORE603E_FPGA_VECT_DATA);
 
  if ((irq & 0xffff0) != 0x10) {
    DEBUG_puts( "ERROR:: no irq data\n");
    return (irq | 0x80);
  }
 
  irq &=0xf;
 
  return irq;
}
 
#endif /* end of generation 2 */
 

Line No.	Rev	Author	Line
1	30	unneback	`/* FPGA.c`
2			`*`
3			`* COPYRIGHT (c) 1989-1997.`
4			`* On-Line Applications Research Corporation (OAR).`
5			`* Copyright assigned to U.S. Government, 1994.`
6			`*`
7			`* The license and distribution terms for this file may in`
8			`* the file LICENSE in this distribution or at`
9			`* http://www.OARcorp.com/rtems/license.html.`
10			`*`
11			`* $Id:`
12			`*/`
13
14			`#include <bsp.h>`
15			`#if (SCORE603E_GENERATION == 2)`
16			`#include <rtems/libio.h>`
17
18			`#include <libcsupport.h>`
19
20			`#include <string.h>`
21			`#include <fcntl.h>`
22			`#include <assert.h>`
23
24			`/*`
25			`* initialize FPGA`
26			`*/`
27			`void initialize_PCI_bridge ()`
28			`{`
29			`#if (!SCORE603E_USE_DINK)`
30			`rtems_unsigned16 mask, shift, data;`
31
32			`shift = SCORE603E_85C30_0_IRQ - Score_IRQ_First;`
33			`mask = 1 << shift;`
34
35			`shift = SCORE603E_85C30_1_IRQ - Score_IRQ_First;`
36			`mask = mask & (1 << shift);`
37
38			`data = *SCORE603E_FPGA_MASK_DATA;`
39			`data = ~mask;`
40
41			`*SCORE603E_FPGA_MASK_DATA = data;`
42			`#endif`
43
44			`}`
45
46			`void set_irq_mask(`
47			`rtems_unsigned16 value`
48			`)`
49			`{`
50			`rtems_unsigned16 *loc;`
51
52			`loc = (rtems_unsigned16 *)SCORE603E_FPGA_MASK_DATA;`
53
54			`*loc = value;`
55			`}`
56
57			`rtems_unsigned16 get_irq_mask()`
58			`{`
59			`rtems_unsigned16 *loc;`
60			`rtems_unsigned16 value;`
61
62			`loc = (rtems_unsigned16 *)SCORE603E_FPGA_MASK_DATA;`
63
64			`value = *loc;`
65
66			`return value;`
67			`}`
68
69			`void unmask_irq(`
70			`rtems_unsigned16 irq_idx`
71			`)`
72			`{`
73			`rtems_unsigned16 value;`
74			`rtems_unsigned32 mask_idx = irq_idx;`
75
76			`value = get_irq_mask();`
77
78			`#if (HAS_PMC_PSC8)`
79			`switch (irq_idx + Score_IRQ_First ) {`
80			`case SCORE603E_85C30_4_IRQ:`
81			`case SCORE603E_85C30_2_IRQ:`
82			`case SCORE603E_85C30_5_IRQ:`
83			`case SCORE603E_85C30_3_IRQ:`
84			`mask_idx = SCORE603E_PCI_IRQ_0 - Score_IRQ_First;`
85			`break;`
86			`default:`
87			`break;`
88			`}`
89			`#endif`
90
91			`value &= (~(0x1 << mask_idx));`
92			`set_irq_mask( value );`
93			`}`
94
95
96			`void init_irq_data_register()`
97			`{`
98			`rtems_unsigned32 index;`
99			`rtems_unsigned32 i;`
100
101			`#if (SCORE603E_USE_DINK)`
102			`set_irq_mask( 0xffff );`
103			`#endif`
104
105			`/*`
106			`* Clear any existing interupts from the vector data register.`
107			`*/`
108			`for (i=0; i<20; i++) {`
109			`index = (*SCORE603E_FPGA_VECT_DATA);`
110			`if ( (index&0x10) != 0x10 )`
111			`break;`
112			`}`
113			`}`
114
115			`rtems_unsigned16 read_and_clear_PMC_irq(`
116			`rtems_unsigned16 irq`
117			`)`
118			`{`
119			`rtems_unsigned16 status_word = irq;`
120
121			`status_word = (*SCORE603E_PMC_STATUS_ADDRESS);`
122
123			`return status_word;`
124			`}`
125
126			`rtems_boolean Is_PMC_IRQ(`
127			`rtems_unsigned32 pmc_irq,`
128			`rtems_unsigned16 status_word`
129			`)`
130			`{`
131			`rtems_boolean result= FALSE;`
132
133			`switch(pmc_irq) {`
134			`case SCORE603E_85C30_4_IRQ:`
135			`result = Is_PMC_85C30_4_IRQ( status_word );`
136			`break;`
137			`case SCORE603E_85C30_2_IRQ:`
138			`result = Is_PMC_85C30_2_IRQ( status_word );`
139			`break;`
140			`case SCORE603E_85C30_5_IRQ:`
141			`result = Is_PMC_85C30_5_IRQ( status_word );`
142			`break;`
143			`case SCORE603E_85C30_3_IRQ:`
144			`result = Is_PMC_85C30_3_IRQ( status_word );`
145			`break;`
146			`default:`
147			`assert( 0 );`
148			`break;`
149			`}`
150
151			`return result;`
152			`}`
153
154			`rtems_unsigned16 read_and_clear_irq()`
155			`{`
156			`rtems_unsigned16 irq;`
157
158			`irq = (*SCORE603E_FPGA_VECT_DATA);`
159
160			`if ((irq & 0xffff0) != 0x10) {`
161			`DEBUG_puts( "ERROR:: no irq data\n");`
162			`return (irq \| 0x80);`
163			`}`
164
165			`irq &=0xf;`
166
167			`return irq;`
168			`}`
169
170			`#endif /* end of generation 2 */`
171

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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [score603e/] [startup/] [FPGA.c] - Blame information for rev 173