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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [powerpc/] [shared/] [irq/] [irq.h] - Blame information for rev 173

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/* irq.h
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 *
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 *  This include file describe the data structure and the functions implemented
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 *  by rtems to write interrupt handlers.
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 *
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 *  CopyRight (C) 1999 valette@crf.canon.fr
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 *
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 *  This code is heavilly inspired by the public specification of STREAM V2
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 *  that can be found at :
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 *
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 *      <http://www.chorus.com/Documentation/index.html> by following
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 *  the STREAM API Specification Document link.
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 *
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 *  The license and distribution terms for this file may be
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 *  found in found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: irq.h,v 1.2 2001-09-27 12:01:06 chris Exp $
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 */
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#ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
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#define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
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/*
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 * 8259 edge/level control definitions at VIA
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 */
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#define ISA8259_M_ELCR          0x4d0
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#define ISA8259_S_ELCR          0x4d1
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#define ELCRS_INT15_LVL         0x80
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#define ELCRS_INT14_LVL         0x40
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#define ELCRS_INT13_LVL         0x20
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#define ELCRS_INT12_LVL         0x10
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#define ELCRS_INT11_LVL         0x08
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#define ELCRS_INT10_LVL         0x04
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#define ELCRS_INT9_LVL          0x02
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#define ELCRS_INT8_LVL          0x01
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#define ELCRM_INT7_LVL          0x80
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#define ELCRM_INT6_LVL          0x40
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#define ELCRM_INT5_LVL          0x20
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#define ELCRM_INT4_LVL          0x10
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#define ELCRM_INT3_LVL          0x8
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#define ELCRM_INT2_LVL          0x4
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#define ELCRM_INT1_LVL          0x2
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#define ELCRM_INT0_LVL          0x1
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#define BSP_ASM_IRQ_VECTOR_BASE 0x0
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    /* PIC's command and mask registers */
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#define PIC_MASTER_COMMAND_IO_PORT              0x20    /* Master PIC command register */
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#define PIC_SLAVE_COMMAND_IO_PORT               0xa0    /* Slave PIC command register */
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#define PIC_MASTER_IMR_IO_PORT                  0x21    /* Master PIC Interrupt Mask Register */
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#define PIC_SLAVE_IMR_IO_PORT                   0xa1    /* Slave PIC Interrupt Mask Register */
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    /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
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#define PIC_EOSI        0x60    /* End of Specific Interrupt (EOSI) */
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#define SLAVE_PIC_EOSI  0x62    /* End of Specific Interrupt (EOSI) for cascade */
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#define PIC_EOI         0x20    /* Generic End of Interrupt (EOI) */
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#ifndef ASM
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62
 
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/*
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 * Symblolic IRQ names and related definitions.
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 */
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typedef enum {
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  /* Base vector for our ISA IRQ handlers. */
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  BSP_ISA_IRQ_VECTOR_BASE       =       BSP_ASM_IRQ_VECTOR_BASE,
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  /*
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   * ISA IRQ handler related definitions
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   */
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  BSP_ISA_IRQ_NUMBER            =       16,
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  BSP_ISA_IRQ_LOWEST_OFFSET     =       0,
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  BSP_ISA_IRQ_MAX_OFFSET        =       BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
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  /*
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   * PCI IRQ handlers related definitions
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   * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
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   */
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  BSP_PCI_IRQ_NUMBER            =       16,
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  BSP_PCI_IRQ_LOWEST_OFFSET     =       BSP_ISA_IRQ_NUMBER,
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  BSP_PCI_IRQ_MAX_OFFSET        =       BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
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  /*
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   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
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   * handler might be connected
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   */
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  BSP_PROCESSOR_IRQ_NUMBER      =       1,
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  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_PCI_IRQ_MAX_OFFSET + 1,
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  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
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  /*
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   * Summary
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   */
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  BSP_IRQ_NUMBER                =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
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  BSP_LOWEST_OFFSET             =       BSP_ISA_IRQ_LOWEST_OFFSET,
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  BSP_MAX_OFFSET                =       BSP_PROCESSOR_IRQ_MAX_OFFSET,
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    /*
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     * Some ISA IRQ symbolic name definition
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     */
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  BSP_ISA_PERIODIC_TIMER        =       0,
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  BSP_ISA_KEYBOARD              =       1,
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  BSP_ISA_UART_COM2_IRQ         =       3,
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  BSP_ISA_UART_COM1_IRQ         =       4,
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  BSP_ISA_RT_TIMER1             =       8,
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  BSP_ISA_RT_TIMER3             =       10,
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    /*
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     * Some PCI IRQ symbolic name definition
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     */
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  BSP_PCI_IRQ0                  =       BSP_PCI_IRQ_LOWEST_OFFSET,
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  BSP_PCI_ISA_BRIDGE_IRQ        =       BSP_PCI_IRQ0,
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    /*
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     * Some Processor execption handled as rtems IRQ symbolic name definition
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     */
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  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
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120
}rtems_irq_symbolic_name;
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/*
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 * Type definition for RTEMS managed interrupts
127
 */
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typedef unsigned char  rtems_irq_prio;
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typedef unsigned short rtems_i8259_masks;
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extern  volatile rtems_i8259_masks i8259s_cache;
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struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
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typedef void (*rtems_irq_hdl)           (void);
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typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
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typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
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typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
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140
typedef struct __rtems_irq_connect_data__ {
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  /*
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   * IRQ line
143
   */
144
  rtems_irq_symbolic_name       name;
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  /*
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   * handler. See comment on handler properties below in function prototype.
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   */
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  rtems_irq_hdl                 hdl;
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  /*
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   * function for enabling interrupts at device level (ONLY!).
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   * The BSP code will automatically enable it at i8259s level and openpic level.
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   * RATIONALE : anyway such code has to exist in current driver code.
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   * It is usually called immediately AFTER connecting the interrupt handler.
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   * RTEMS may well need such a function when restoring normal interrupt
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   * processing after a debug session.
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   *
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   */
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    rtems_irq_enable            on;
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  /*
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   * function for disabling interrupts at device level (ONLY!).
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   * The code will disable it at i8259s level. RATIONALE : anyway
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   * such code has to exist for clean shutdown. It is usually called
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   * BEFORE disconnecting the interrupt. RTEMS may well need such
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   * a function when disabling normal interrupt processing for
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   * a debug session. May well be a NOP function.
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   */
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  rtems_irq_disable             off;
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  /*
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   * function enabling to know what interrupt may currently occur
170
   * if someone manipulates the i8259s interrupt mask without care...
171
   */
172
    rtems_irq_is_enabled        isOn;
173
}rtems_irq_connect_data;
174
 
175
typedef struct {
176
  /*
177
   * size of all the table fields (*Tbl) described below.
178
   */
179
  unsigned int                  irqNb;
180
  /*
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   * Default handler used when disconnecting interrupts.
182
   */
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  rtems_irq_connect_data        defaultEntry;
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  /*
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   * Table containing initials/current value.
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   */
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  rtems_irq_connect_data*       irqHdlTbl;
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  /*
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   * actual value of BSP_ISA_IRQ_VECTOR_BASE...
190
   */
191
  rtems_irq_symbolic_name       irqBase;
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  /*
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   * software priorities associated with interrupts.
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   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
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   * interrupt handler hdl connected for interrupt name i
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   * will  not be interrupted by the handler connected for interrupt j
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   * The interrupt source  will be physically masked at i8259 level.
198
   */
199
    rtems_irq_prio*             irqPrioTbl;
200
}rtems_irq_global_settings;
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/*-------------------------------------------------------------------------+
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| Function Prototypes.
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+--------------------------------------------------------------------------*/
208
/*
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 * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
210
 */
211
 
212
/*
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 * function to disable a particular irq at 8259 level. After calling
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 * this function, even if the device asserts the interrupt line it will
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 * not be propagated further to the processor
216
 */
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int BSP_irq_disable_at_i8259s        (const rtems_irq_symbolic_name irqLine);
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/*
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 * function to enable a particular irq at 8259 level. After calling
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 * this function, if the device asserts the interrupt line it will
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 * be propagated further to the processor
222
 */
223
int BSP_irq_enable_at_i8259s            (const rtems_irq_symbolic_name irqLine);
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/*
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 * function to acknoledge a particular irq at 8259 level. After calling
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 * this function, if a device asserts an enabled interrupt line it will
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 * be propagated further to the processor. Mainly usefull for people
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 * writting raw handlers as this is automagically done for rtems managed
229
 * handlers.
230
 */
231
int BSP_irq_ack_at_i8259s               (const rtems_irq_symbolic_name irqLine);
232
/*
233
 * function to check if a particular irq is enabled at 8259 level. After calling
234
 */
235
int BSP_irq_enabled_at_i8259s           (const rtems_irq_symbolic_name irqLine);
236
/*
237
 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
238
 */
239
/*
240
 * function to connect a particular irq handler. This hanlder will NOT be called
241
 * directly as the result of the corresponding interrupt. Instead, a RTEMS
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 * irq prologue will be called that will :
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 *
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 *      1) save the C scratch registers,
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 *      2) switch to a interrupt stack if the interrupt is not nested,
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 *      3) store the current i8259s' interrupt masks
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 *      4) modify them to disable the current interrupt at 8259 level (and may
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 *      be others depending on software priorities)
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 *      5) aknowledge the i8259s',
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 *      6) demask the processor,
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 *      7) call the application handler
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 *
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 * As a result the hdl function provided
254
 *
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 *      a) can perfectly be written is C,
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 *      b) may also well directly call the part of the RTEMS API that can be used
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 *      from interrupt level,
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 *      c) It only responsible for handling the jobs that need to be done at
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 *      the device level including (aknowledging/re-enabling the interrupt at device,
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 *      level, getting the data,...)
261
 *
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 *      When returning from the function, the following will be performed by
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 *      the RTEMS irq epilogue :
264
 *
265
 *      1) masks the interrupts again,
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 *      2) restore the original i8259s' interrupt masks
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 *      3) switch back on the orinal stack if needed,
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 *      4) perform rescheduling when necessary,
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 *      5) restore the C scratch registers...
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 *      6) restore initial execution flow
271
 *
272
 */
273
int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
274
/*
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 * function to get the current RTEMS irq handler for ptr->name. It enables to
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 * define hanlder chain...
277
 */
278
int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
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/*
280
 * function to get disconnect the RTEMS irq handler for ptr->name.
281
 * This function checks that the value given is the current one for safety reason.
282
 * The user can use the previous function to get it.
283
 */
284
int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
285
 
286
/*
287
 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
288
 */
289
/*
290
 * (Re) Initialize the RTEMS interrupt management.
291
 *
292
 * The result of calling this function will be the same as if each individual
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 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
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 * has been individualy connected via
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 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
296
 * And each handler currently equal to config->defaultEntry.hdl
297
 * has been previously disconnected via
298
 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
299
 *
300
 * This is to say that all information given will be used and not just
301
 * only the space.
302
 *
303
 * CAUTION : the various table address contained in config will be used
304
 *           directly by the interrupt mangement code in order to save
305
 *           data size so they must stay valid after the call => they should
306
 *           not be modified or declared on a stack.
307
 */
308
 
309
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
310
/*
311
 * (Re) get info on current RTEMS interrupt management.
312
 */
313
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
314
 
315
extern void BSP_rtems_irq_mng_init(unsigned cpuId);
316
extern void BSP_i8259s_init(void);
317
#endif
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#endif

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