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/* 11/02/95                                                                   */
2
/*----------------------------------------------------------------------------*/
3
/*      Plug and Play header definitions                                      */
4
/*----------------------------------------------------------------------------*/
5
 
6
/* Structure map for PnP on PowerPC Reference Platform                        */
7
/* See Plug and Play ISA Specification, Version 1.0, May 28, 1993.  It        */
8
/* (or later versions) is available on Compuserve in the PLUGPLAY area.       */
9
/* This code has extensions to that specification, namely new short and       */
10
/* long tag types for platform dependent information                          */
11
 
12
/* Warning: LE notation used throughout this file                             */
13
 
14
/* For enum's: if given in hex then they are bit significant, i.e.            */
15
/* only one bit is on for each enum                                           */
16
 
17
/*
18
 * $Id: pnp.h,v 1.2 2001-09-27 12:01:07 chris Exp $
19
 */
20
 
21
#ifndef _PNP_
22
#define _PNP_
23
 
24
#ifndef ASM
25
#define MAX_MEM_REGISTERS 9
26
#define MAX_IO_PORTS 20
27
#define MAX_IRQS 7
28
/*#define MAX_DMA_CHANNELS 7*/
29
 
30
/* Interrupt controllers */
31
 
32
#define PNPinterrupt0 "PNP0000"      /* AT Interrupt Controller               */
33
#define PNPinterrupt1 "PNP0001"      /* EISA Interrupt Controller             */
34
#define PNPinterrupt2 "PNP0002"      /* MCA Interrupt Controller              */
35
#define PNPinterrupt3 "PNP0003"      /* APIC                                  */
36
#define PNPExtInt     "IBM000D"      /* PowerPC Extended Interrupt Controller */
37
 
38
/* Timers */
39
 
40
#define PNPtimer0     "PNP0100"      /* AT Timer                              */
41
#define PNPtimer1     "PNP0101"      /* EISA Timer                            */
42
#define PNPtimer2     "PNP0102"      /* MCA Timer                             */
43
 
44
/* DMA controllers */
45
 
46
#define PNPdma0       "PNP0200"      /* AT DMA Controller                     */
47
#define PNPdma1       "PNP0201"      /* EISA DMA Controller                   */
48
#define PNPdma2       "PNP0202"      /* MCA DMA Controller                    */
49
 
50
/* start of August 15, 1994 additions */
51
/* CMOS */
52
#define PNPCMOS       "IBM0009"      /* CMOS                                  */
53
 
54
/* L2 Cache */
55
#define PNPL2         "IBM0007"      /* L2 Cache                              */
56
 
57
/* NVRAM */
58
#define PNPNVRAM      "IBM0008"      /* NVRAM                                 */
59
 
60
/* Power Management */
61
#define PNPPM         "IBM0005"      /* Power Management                      */
62
/* end of August 15, 1994 additions */
63
 
64
/* Keyboards */
65
 
66
#define PNPkeyboard0  "PNP0300"      /* IBM PC/XT KB Cntlr (83 key, no mouse) */
67
#define PNPkeyboard1  "PNP0301"      /* Olivetti ICO (102 key)                */
68
#define PNPkeyboard2  "PNP0302"      /* IBM PC/AT KB Cntlr (84 key)           */
69
#define PNPkeyboard3  "PNP0303"      /* IBM Enhanced (101/2 key, PS/2 mouse)  */
70
#define PNPkeyboard4  "PNP0304"      /* Nokia 1050 KB Cntlr                   */
71
#define PNPkeyboard5  "PNP0305"      /* Nokia 9140 KB Cntlr                   */
72
#define PNPkeyboard6  "PNP0306"      /* Standard Japanese KB Cntlr            */
73
#define PNPkeyboard7  "PNP0307"      /* Microsoft Windows (R) KB Cntlr        */
74
 
75
/* Parallel port controllers */
76
 
77
#define PNPparallel0 "PNP0400"       /* Standard LPT Parallel Port            */
78
#define PNPparallel1 "PNP0401"       /* ECP Parallel Port                     */
79
#define PNPepp       "IBM001C"       /* EPP Parallel Port                     */
80
 
81
/* Serial port controllers */
82
 
83
#define PNPserial0   "PNP0500"       /* Standard PC Serial port               */
84
#define PNPSerial1   "PNP0501"       /* 16550A Compatible Serial port         */
85
 
86
/* Disk controllers */
87
 
88
#define PNPdisk0     "PNP0600"       /* Generic ESDI/IDE/ATA Compat HD Cntlr  */
89
#define PNPdisk1     "PNP0601"       /* Plus Hardcard II                      */
90
#define PNPdisk2     "PNP0602"       /* Plus Hardcard IIXL/EZ                 */
91
 
92
/* Diskette controllers */
93
 
94
#define PNPdiskette0 "PNP0700"       /* PC Standard Floppy Disk Controller    */
95
 
96
/* Display controllers */
97
 
98
#define PNPdisplay0  "PNP0900"       /* VGA Compatible                        */
99
#define PNPdisplay1  "PNP0901"       /* Video Seven VGA                       */
100
#define PNPdisplay2  "PNP0902"       /* 8514/A Compatible                     */
101
#define PNPdisplay3  "PNP0903"       /* Trident VGA                           */
102
#define PNPdisplay4  "PNP0904"       /* Cirrus Logic Laptop VGA               */
103
#define PNPdisplay5  "PNP0905"       /* Cirrus Logic VGA                      */
104
#define PNPdisplay6  "PNP0906"       /* Tseng ET4000 or ET4000/W32            */
105
#define PNPdisplay7  "PNP0907"       /* Western Digital VGA                   */
106
#define PNPdisplay8  "PNP0908"       /* Western Digital Laptop VGA            */
107
#define PNPdisplay9  "PNP0909"       /* S3                                    */
108
#define PNPdisplayA  "PNP090A"       /* ATI Ultra Pro/Plus (Mach 32)          */
109
#define PNPdisplayB  "PNP090B"       /* ATI Ultra (Mach 8)                    */
110
#define PNPdisplayC  "PNP090C"       /* XGA Compatible                        */
111
#define PNPdisplayD  "PNP090D"       /* ATI VGA Wonder                        */
112
#define PNPdisplayE  "PNP090E"       /* Weitek P9000 Graphics Adapter         */
113
#define PNPdisplayF  "PNP090F"       /* Oak Technology VGA                    */
114
 
115
/* Peripheral busses */
116
 
117
#define PNPbuses0    "PNP0A00"       /* ISA Bus                               */
118
#define PNPbuses1    "PNP0A01"       /* EISA Bus                              */
119
#define PNPbuses2    "PNP0A02"       /* MCA Bus                               */
120
#define PNPbuses3    "PNP0A03"       /* PCI Bus                               */
121
#define PNPbuses4    "PNP0A04"       /* VESA/VL Bus                           */
122
 
123
/* RTC, BIOS, planar devices */
124
 
125
#define PNPspeaker0  "PNP0800"       /* AT Style Speaker Sound                */
126
#define PNPrtc0      "PNP0B00"       /* AT RTC                                */
127
#define PNPpnpbios0  "PNP0C00"       /* PNP BIOS (only created by root enum)  */
128
#define PNPpnpbios1  "PNP0C01"       /* System Board Memory Device            */
129
#define PNPpnpbios2  "PNP0C02"       /* Math Coprocessor                      */
130
#define PNPpnpbios3  "PNP0C03"       /* PNP BIOS Event Notification Interrupt */
131
 
132
/* PCMCIA controller */
133
 
134
#define PNPpcmcia0   "PNP0E00"       /* Intel 82365 Compatible PCMCIA Cntlr   */
135
 
136
/* Mice */
137
 
138
#define PNPmouse0    "PNP0F00"       /* Microsoft Bus Mouse                   */
139
#define PNPmouse1    "PNP0F01"       /* Microsoft Serial Mouse                */
140
#define PNPmouse2    "PNP0F02"       /* Microsoft Inport Mouse                */
141
#define PNPmouse3    "PNP0F03"       /* Microsoft PS/2 Mouse                  */
142
#define PNPmouse4    "PNP0F04"       /* Mousesystems Mouse                    */
143
#define PNPmouse5    "PNP0F05"       /* Mousesystems 3 Button Mouse - COM2    */
144
#define PNPmouse6    "PNP0F06"       /* Genius Mouse - COM1                   */
145
#define PNPmouse7    "PNP0F07"       /* Genius Mouse - COM2                   */
146
#define PNPmouse8    "PNP0F08"       /* Logitech Serial Mouse                 */
147
#define PNPmouse9    "PNP0F09"       /* Microsoft Ballpoint Serial Mouse      */
148
#define PNPmouseA    "PNP0F0A"       /* Microsoft PNP Mouse                   */
149
#define PNPmouseB    "PNP0F0B"       /* Microsoft PNP Ballpoint Mouse         */
150
 
151
/* Modems */
152
 
153
#define PNPmodem0    "PNP9000"       /* Specific IDs TBD                      */
154
 
155
/* Network controllers */
156
 
157
#define PNPnetworkC9 "PNP80C9"       /* IBM Token Ring                        */
158
#define PNPnetworkCA "PNP80CA"       /* IBM Token Ring II                     */
159
#define PNPnetworkCB "PNP80CB"       /* IBM Token Ring II/Short               */
160
#define PNPnetworkCC "PNP80CC"       /* IBM Token Ring 4/16Mbs                */
161
#define PNPnetwork27 "PNP8327"       /* IBM Token Ring (All types)            */
162
#define PNPnetworket "IBM0010"       /* IBM Ethernet used by Power PC         */
163
#define PNPneteisaet "IBM2001"       /* IBM Ethernet EISA adapter             */
164
#define PNPAMD79C970 "IBM0016"       /* AMD 79C970 (PCI Ethernet)             */
165
 
166
/* SCSI controllers */
167
 
168
#define PNPscsi0     "PNPA000"       /* Adaptec 154x Compatible SCSI Cntlr    */
169
#define PNPscsi1     "PNPA001"       /* Adaptec 174x Compatible SCSI Cntlr    */
170
#define PNPscsi2     "PNPA002"       /* Future Domain 16-700 Compat SCSI Cntlr*/
171
#define PNPscsi3     "PNPA003"       /* Panasonic CDROM Adapter (SBPro/SB16)  */
172
#define PNPscsiF     "IBM000F"       /* NCR 810 SCSI Controller               */
173
#define PNPscsi825   "IBM001B"       /* NCR 825 SCSI Controller               */
174
#define PNPscsi875   "IBM0018"       /* NCR 875 SCSI Controller               */
175
 
176
/* Sound/Video, Multimedia */
177
 
178
#define PNPmm0       "PNPB000"       /* Sound Blaster Compatible Sound Device */
179
#define PNPmm1       "PNPB001"       /* MS Windows Sound System Compat Device */
180
#define PNPmmF       "IBM000E"       /* Crystal CS4231 Audio Device           */
181
#define PNPv7310     "IBM0015"       /* ASCII V7310 Video Capture Device      */
182
#define PNPmm4232    "IBM0017"       /* Crystal CS4232 Audio Device           */
183
#define PNPpmsyn     "IBM001D"       /* YMF 289B chip (Yamaha)                */
184
#define PNPgp4232    "IBM0012"       /* Crystal CS4232 Game Port              */
185
#define PNPmidi4232  "IBM0013"       /* Crystal CS4232 MIDI                   */
186
 
187
/* Operator Panel */
188
#define PNPopctl     "IBM000B"       /* Operator's panel                      */
189
 
190
/* Service Processor */
191
#define PNPsp        "IBM0011"       /* IBM Service Processor                 */
192
#define PNPLTsp      "IBM001E"       /* Lightning/Terlingua Support Processor */
193
#define PNPLTmsp     "IBM001F"       /* Lightning/Terlingua Mini-SP           */
194
 
195
/* Memory Controller */
196
#define PNPmemctl    "IBM000A"       /* Memory controller                     */
197
 
198
/* Graphics Assist */
199
#define PNPg_assist  "IBM0014"       /* Graphics Assist                       */
200
 
201
/* Miscellaneous Device Controllers */
202
#define PNPtablet    "IBM0019"       /* IBM Tablet Controller                 */
203
 
204
/* PNP Packet Handles */
205
 
206
#define S1_Packet                0x0A   /* Version resource                   */
207
#define S2_Packet                0x15   /* Logical DEVID (without flags)      */
208
#define S2_Packet_flags          0x16   /* Logical DEVID (with flags)         */
209
#define S3_Packet                0x1C   /* Compatible device ID               */
210
#define S4_Packet                0x22   /* IRQ resource (without flags)       */
211
#define S4_Packet_flags          0x23   /* IRQ resource (with flags)          */
212
#define S5_Packet                0x2A   /* DMA resource                       */
213
#define S6_Packet                0x30   /* Depend funct start (w/o priority)  */
214
#define S6_Packet_priority       0x31   /* Depend funct start (w/ priority)   */
215
#define S7_Packet                0x38   /* Depend funct end                   */
216
#define S8_Packet                0x47   /* I/O port resource (w/o fixed loc)  */
217
#define S9_Packet_fixed          0x4B   /* I/O port resource (w/ fixed loc)   */
218
#define S14_Packet               0x71   /* Vendor defined                     */
219
#define S15_Packet               0x78   /* End of resource (w/o checksum)     */
220
#define S15_Packet_checksum      0x79   /* End of resource (w/ checksum)      */
221
#define L1_Packet                0x81   /* Memory range                       */
222
#define L1_Shadow                0x20   /* Memory is shadowable               */
223
#define L1_32bit_mem             0x18   /* 32-bit memory only                 */
224
#define L1_8_16bit_mem           0x10   /* 8- and 16-bit supported            */
225
#define L1_Decode_Hi             0x04   /* decode supports high address       */
226
#define L1_Cache                 0x02   /* read cacheable, write-through      */
227
#define L1_Writeable             0x01   /* Memory is writeable                */
228
#define L2_Packet                0x82   /* ANSI ID string                     */
229
#define L3_Packet                0x83   /* Unicode ID string                  */
230
#define L4_Packet                0x84   /* Vendor defined                     */
231
#define L5_Packet                0x85   /* Large I/O                          */
232
#define L6_Packet                0x86   /* 32-bit Fixed Loc Mem Range Desc    */
233
#define END_TAG                  0x78   /* End of resource                    */
234
#define DF_START_TAG             0x30   /* Dependent function start           */
235
#define DF_START_TAG_priority    0x31   /* Dependent function start           */
236
#define DF_END_TAG               0x38   /* Dependent function end             */
237
#define SUBOPTIMAL_CONFIGURATION 0x2    /* Priority byte sub optimal config   */
238
 
239
/* Device Base Type Codes */
240
 
241
typedef enum _PnP_BASE_TYPE {
242
  Reserved = 0,
243
  MassStorageDevice = 1,
244
  NetworkInterfaceController = 2,
245
  DisplayController = 3,
246
  MultimediaController = 4,
247
  MemoryController = 5,
248
  BridgeController = 6,
249
  CommunicationsDevice = 7,
250
  SystemPeripheral = 8,
251
  InputDevice = 9,
252
  ServiceProcessor = 0x0A,              /* 11/2/95                            */
253
  } PnP_BASE_TYPE;
254
 
255
/* Device Sub Type Codes */
256
 
257
typedef enum _PnP_SUB_TYPE {
258
  SCSIController = 0,
259
  IDEController = 1,
260
  FloppyController = 2,
261
  IPIController = 3,
262
  OtherMassStorageController = 0x80,
263
 
264
  EthernetController = 0,
265
  TokenRingController = 1,
266
  FDDIController = 2,
267
  OtherNetworkController = 0x80,
268
 
269
  VGAController= 0,
270
  SVGAController= 1,
271
  XGAController= 2,
272
  OtherDisplayController = 0x80,
273
 
274
  VideoController = 0,
275
  AudioController = 1,
276
  OtherMultimediaController = 0x80,
277
 
278
  RAM = 0,
279
  FLASH = 1,
280
  OtherMemoryDevice = 0x80,
281
 
282
  HostProcessorBridge = 0,
283
  ISABridge = 1,
284
  EISABridge = 2,
285
  MicroChannelBridge = 3,
286
  PCIBridge = 4,
287
  PCMCIABridge = 5,
288
  VMEBridge = 6,
289
  OtherBridgeDevice = 0x80,
290
 
291
  RS232Device = 0,
292
  ATCompatibleParallelPort = 1,
293
  OtherCommunicationsDevice = 0x80,
294
 
295
  ProgrammableInterruptController = 0,
296
  DMAController = 1,
297
  SystemTimer = 2,
298
  RealTimeClock = 3,
299
  L2Cache = 4,
300
  NVRAM = 5,
301
  PowerManagement = 6,
302
  CMOS = 7,
303
  OperatorPanel = 8,
304
  ServiceProcessorClass1 = 9,
305
  ServiceProcessorClass2 = 0xA,
306
  ServiceProcessorClass3 = 0xB,
307
  GraphicAssist = 0xC,
308
  SystemPlanar = 0xF,                   /* 10/5/95                            */
309
  OtherSystemPeripheral = 0x80,
310
 
311
  KeyboardController = 0,
312
  Digitizer = 1,
313
  MouseController = 2,
314
  TabletController = 3,                 /* 10/27/95                           */
315
  OtherInputController = 0x80,
316
 
317
  GeneralMemoryController = 0,
318
  } PnP_SUB_TYPE;
319
 
320
/* Device Interface Type Codes */
321
 
322
typedef enum _PnP_INTERFACE {
323
  General = 0,
324
  GeneralSCSI = 0,
325
  GeneralIDE = 0,
326
  ATACompatible = 1,
327
 
328
  GeneralFloppy = 0,
329
  Compatible765 = 1,
330
  NS398_Floppy = 2,                     /* NS Super I/O wired to use index
331
                                           register at port 398 and data
332
                                           register at port 399               */
333
  NS26E_Floppy = 3,                     /* Ports 26E and 26F                  */
334
  NS15C_Floppy = 4,                     /* Ports 15C and 15D                  */
335
  NS2E_Floppy = 5,                      /* Ports 2E and 2F                    */
336
  CHRP_Floppy = 6,                      /* CHRP Floppy in PR*P system         */
337
 
338
  GeneralIPI = 0,
339
 
340
  GeneralEther = 0,
341
  GeneralToken = 0,
342
  GeneralFDDI = 0,
343
 
344
  GeneralVGA = 0,
345
  GeneralSVGA = 0,
346
  GeneralXGA = 0,
347
 
348
  GeneralVideo = 0,
349
  GeneralAudio = 0,
350
  CS4232Audio = 1,                      /* CS 4232 Plug 'n Play Configured    */
351
 
352
  GeneralRAM = 0,
353
  GeneralFLASH = 0,
354
  PCIMemoryController = 0,              /* PCI Config Method                  */
355
  RS6KMemoryController = 1,             /* RS6K Config Method                 */
356
 
357
  GeneralHostBridge = 0,
358
  GeneralISABridge = 0,
359
  GeneralEISABridge = 0,
360
  GeneralMCABridge = 0,
361
  GeneralPCIBridge = 0,
362
  PCIBridgeDirect = 0,
363
  PCIBridgeIndirect = 1,
364
  PCIBridgeRS6K = 2,
365
  GeneralPCMCIABridge = 0,
366
  GeneralVMEBridge = 0,
367
 
368
  GeneralRS232 = 0,
369
  COMx = 1,
370
  Compatible16450 = 2,
371
  Compatible16550 = 3,
372
  NS398SerPort = 4,                     /* NS Super I/O wired to use index
373
                                           register at port 398 and data
374
                                           register at port 399               */
375
  NS26ESerPort = 5,                     /* Ports 26E and 26F                  */
376
  NS15CSerPort = 6,                     /* Ports 15C and 15D                  */
377
  NS2ESerPort = 7,                      /* Ports 2E and 2F                    */
378
 
379
  GeneralParPort = 0,
380
  LPTx = 1,
381
  NS398ParPort = 2,                     /* NS Super I/O wired to use index
382
                                           register at port 398 and data
383
                                           register at port 399               */
384
  NS26EParPort = 3,                     /* Ports 26E and 26F                  */
385
  NS15CParPort = 4,                     /* Ports 15C and 15D                  */
386
  NS2EParPort = 5,                      /* Ports 2E and 2F                    */
387
 
388
  GeneralPIC = 0,
389
  ISA_PIC = 1,
390
  EISA_PIC = 2,
391
  MPIC = 3,
392
  RS6K_PIC = 4,
393
 
394
  GeneralDMA = 0,
395
  ISA_DMA = 1,
396
  EISA_DMA = 2,
397
 
398
  GeneralTimer = 0,
399
  ISA_Timer = 1,
400
  EISA_Timer = 2,
401
  GeneralRTC = 0,
402
  ISA_RTC = 1,
403
 
404
  StoreThruOnly = 1,
405
  StoreInEnabled = 2,
406
  RS6KL2Cache = 3,
407
 
408
  IndirectNVRAM = 0,                    /* Indirectly addressed               */
409
  DirectNVRAM = 1,                      /* Memory Mapped                      */
410
  IndirectNVRAM24 = 2,                  /* Indirectly addressed - 24 bit      */
411
 
412
  GeneralPowerManagement = 0,
413
  EPOWPowerManagement = 1,
414
  PowerControl = 2,                    /* d1378                               */
415
 
416
  GeneralCMOS = 0,
417
 
418
  GeneralOPPanel = 0,
419
  HarddiskLight = 1,
420
  CDROMLight = 2,
421
  PowerLight = 3,
422
  KeyLock = 4,
423
  ANDisplay = 5,                        /* AlphaNumeric Display               */
424
  SystemStatusLED = 6,                  /* 3 digit 7 segment LED              */
425
  CHRP_SystemStatusLED = 7,             /* CHRP LEDs in PR*P system           */
426
 
427
  GeneralServiceProcessor = 0,
428
 
429
  TransferData = 1,
430
  IGMC32 = 2,
431
  IGMC64 = 3,
432
 
433
  GeneralSystemPlanar = 0,              /* 10/5/95                            */
434
 
435
  } PnP_INTERFACE;
436
 
437
/* PnP resources */
438
 
439
/* Compressed ASCII is 5 bits per char; 00001=A ... 11010=Z */
440
 
441
typedef struct _SERIAL_ID {
442
  unsigned char VendorID0;              /*    Bit(7)=0                        */
443
                                        /*    Bits(6:2)=1st character in      */
444
                                        /*       compressed ASCII             */
445
                                        /*    Bits(1:0)=2nd character in      */
446
                                        /*       compressed ASCII bits(4:3)   */
447
  unsigned char VendorID1;              /*    Bits(7:5)=2nd character in      */
448
                                        /*       compressed ASCII bits(2:0)   */
449
                                        /*    Bits(4:0)=3rd character in      */
450
                                        /*       compressed ASCII             */
451
  unsigned char VendorID2;              /* Product number - vendor assigned   */
452
  unsigned char VendorID3;              /* Product number - vendor assigned   */
453
 
454
/* Serial number is to provide uniqueness if more than one board of same      */
455
/* type is in system.  Must be "FFFFFFFF" if feature not supported.           */
456
 
457
  unsigned char Serial0;                /* Unique serial number bits (7:0)    */
458
  unsigned char Serial1;                /* Unique serial number bits (15:8)   */
459
  unsigned char Serial2;                /* Unique serial number bits (23:16)  */
460
  unsigned char Serial3;                /* Unique serial number bits (31:24)  */
461
  unsigned char Checksum;
462
  } SERIAL_ID;
463
 
464
typedef enum _PnPItemName {
465
  Unused = 0,
466
  PnPVersion = 1,
467
  LogicalDevice = 2,
468
  CompatibleDevice = 3,
469
  IRQFormat = 4,
470
  DMAFormat = 5,
471
  StartDepFunc = 6,
472
  EndDepFunc = 7,
473
  IOPort = 8,
474
  FixedIOPort = 9,
475
  Res1 = 10,
476
  Res2 = 11,
477
  Res3 = 12,
478
  SmallVendorItem = 14,
479
  EndTag = 15,
480
  MemoryRange = 1,
481
  ANSIIdentifier = 2,
482
  UnicodeIdentifier = 3,
483
  LargeVendorItem = 4,
484
  MemoryRange32 = 5,
485
  MemoryRangeFixed32 = 6,
486
  } PnPItemName;
487
 
488
/* Define a bunch of access functions for the bits in the tag field */
489
 
490
/* Tag type - 0 = small; 1 = large */
491
#define tag_type(t) (((t) & 0x80)>>7)
492
#define set_tag_type(t,v) (t = (t & 0x7f) | ((v)<<7))
493
 
494
/* Small item name is 4 bits - one of PnPItemName enum above */
495
#define tag_small_item_name(t) (((t) & 0x78)>>3)
496
#define set_tag_small_item_name(t,v) (t = (t & 0x07) | ((v)<<3))
497
 
498
/* Small item count is 3 bits - count of further bytes in packet */
499
#define tag_small_count(t) ((t) & 0x07)
500
#define set_tag_count(t,v) (t = (t & 0x78) | (v))
501
 
502
/* Large item name is 7 bits - one of PnPItemName enum above */
503
#define tag_large_item_name(t) ((t) & 0x7f)
504
#define set_tag_large_item_name(t,v) (t = (t | 0x80) | (v))
505
 
506
/* a PnP resource is a bunch of contiguous TAG packets ending with an end tag */
507
 
508
typedef union _PnP_TAG_PACKET {
509
  struct _S1_Pack{                      /* VERSION PACKET                     */
510
    unsigned char Tag;                  /* small tag = 0x0a                   */
511
    unsigned char Version[2];           /* PnP version, Vendor version        */
512
    } S1_Pack;
513
 
514
  struct _S2_Pack{                      /* LOGICAL DEVICE ID PACKET           */
515
    unsigned char Tag;                  /* small tag = 0x15 or 0x16           */
516
    unsigned char DevId[4];             /* Logical device id                  */
517
    unsigned char Flags[2];             /* bit(0) boot device;                */
518
                                        /* bit(7:1) cmd in range x31-x37      */
519
                                        /* bit(7:0) cmd in range x28-x3f (opt)*/
520
    } S2_Pack;
521
 
522
  struct _S3_Pack{                      /* COMPATIBLE DEVICE ID PACKET        */
523
    unsigned char Tag;                  /* small tag = 0x1c                   */
524
    unsigned char CompatId[4];          /* Compatible device id               */
525
    } S3_Pack;
526
 
527
  struct _S4_Pack{                      /* IRQ PACKET                         */
528
    unsigned char Tag;                  /* small tag = 0x22 or 0x23           */
529
    unsigned char IRQMask[2];           /* bit(0) is IRQ0, ...;               */
530
                                        /* bit(0) is IRQ8 ...                 */
531
    unsigned char IRQInfo;              /* optional; assume bit(0)=1; else    */
532
                                        /*  bit(0) - high true edge sensitive */
533
                                        /*  bit(1) - low true edge sensitive  */
534
                                        /*  bit(2) - high true level sensitive*/
535
                                        /*  bit(3) - low true level sensitive */
536
                                        /*  bit(7:4) - must be 0              */
537
    } S4_Pack;
538
 
539
  struct _S5_Pack{                      /* DMA PACKET                         */
540
    unsigned char Tag;                  /* small tag = 0x2a                   */
541
    unsigned char DMAMask;              /* bit(0) is channel 0 ...            */
542
    unsigned char DMAInfo;
543
    } S5_Pack;
544
 
545
  struct _S6_Pack{                      /* START DEPENDENT FUNCTION PACKET    */
546
    unsigned char Tag;                  /* small tag = 0x30 or 0x31           */
547
    unsigned char Priority;             /* Optional; if missing then x01; else*/
548
                                        /*  x00 = best possible               */
549
                                        /*  x01 = acceptible                  */
550
                                        /*  x02 = sub-optimal but functional  */
551
    } S6_Pack;
552
 
553
  struct _S7_Pack{                      /* END DEPENDENT FUNCTION PACKET      */
554
    unsigned char Tag;                  /* small tag = 0x38                   */
555
    } S7_Pack;
556
 
557
  struct _S8_Pack{                      /* VARIABLE I/O PORT PACKET           */
558
    unsigned char Tag;                  /* small tag x47                      */
559
    unsigned char IOInfo;               /* x0  = decode only bits(9:0);       */
560
#define  ISAAddr16bit         0x01      /* x01 = decode bits(15:0)            */
561
    unsigned char RangeMin[2];          /* Min base address                   */
562
    unsigned char RangeMax[2];          /* Max base address                   */
563
    unsigned char IOAlign;              /* base alignmt, incr in 1B blocks    */
564
    unsigned char IONum;                /* number of contiguous I/O ports     */
565
    } S8_Pack;
566
 
567
  struct _S9_Pack{                      /* FIXED I/O PORT PACKET              */
568
    unsigned char Tag;                  /* small tag = 0x4b                   */
569
    unsigned char Range[2];             /* base address 10 bits               */
570
    unsigned char IONum;                /* number of contiguous I/O ports     */
571
    } S9_Pack;
572
 
573
  struct _S14_Pack{                     /* VENDOR DEFINED PACKET              */
574
    unsigned char Tag;                  /* small tag = 0x7m m = 1-7           */
575
    union _S14_Data{
576
      unsigned char Data[7];            /* Vendor defined                     */
577
      struct _S14_PPCPack{              /* Pr*p s14 pack                      */
578
         unsigned char Type;            /* 00=non-IBM                         */
579
         unsigned char PPCData[6];      /* Vendor defined                     */
580
        } S14_PPCPack;
581
      } S14_Data;
582
    } S14_Pack;
583
 
584
  struct _S15_Pack{                     /* END PACKET                         */
585
    unsigned char Tag;                  /* small tag = 0x78 or 0x79           */
586
    unsigned char Check;                /* optional - checksum                */
587
    } S15_Pack;
588
 
589
  struct _L1_Pack{                      /* MEMORY RANGE PACKET                */
590
    unsigned char Tag;                  /* large tag = 0x81                   */
591
    unsigned char Count0;               /* x09                                */
592
    unsigned char Count1;               /* x00                                */
593
    unsigned char Data[9];              /* a variable array of bytes,         */
594
                                        /* count in tag                       */
595
    } L1_Pack;
596
 
597
  struct _L2_Pack{                      /* ANSI ID STRING PACKET              */
598
    unsigned char Tag;                  /* large tag = 0x82                   */
599
    unsigned char Count0;               /* Length of string                   */
600
    unsigned char Count1;
601
    unsigned char Identifier[1];        /* a variable array of bytes,         */
602
                                        /* count in tag                       */
603
    } L2_Pack;
604
 
605
  struct _L3_Pack{                      /* UNICODE ID STRING PACKET           */
606
    unsigned char Tag;                  /* large tag = 0x83                   */
607
    unsigned char Count0;               /* Length + 2 of string               */
608
    unsigned char Count1;
609
    unsigned char Country0;             /* TBD                                */
610
    unsigned char Country1;             /* TBD                                */
611
    unsigned char Identifier[1];        /* a variable array of bytes,         */
612
                                        /* count in tag                       */
613
    } L3_Pack;
614
 
615
  struct _L4_Pack{                      /* VENDOR DEFINED PACKET              */
616
    unsigned char Tag;                  /* large tag = 0x84                   */
617
    unsigned char Count0;
618
    unsigned char Count1;
619
    union _L4_Data{
620
      unsigned char Data[1];            /* a variable array of bytes,         */
621
                                        /* count in tag                       */
622
      struct _L4_PPCPack{               /* Pr*p L4 packet                     */
623
         unsigned char Type;            /* 00=non-IBM                         */
624
         unsigned char PPCData[1];      /* a variable array of bytes,         */
625
                                        /* count in tag                       */
626
        } L4_PPCPack;
627
      } L4_Data;
628
    } L4_Pack;
629
 
630
  struct _L5_Pack{
631
    unsigned char Tag;                  /* large tag = 0x85                   */
632
    unsigned char Count0;               /* Count = 17                         */
633
    unsigned char Count1;
634
    unsigned char Data[17];
635
    } L5_Pack;
636
 
637
  struct _L6_Pack{
638
    unsigned char Tag;                  /* large tag = 0x86                   */
639
    unsigned char Count0;               /* Count = 9                          */
640
    unsigned char Count1;
641
    unsigned char Data[9];
642
    } L6_Pack;
643
 
644
  } PnP_TAG_PACKET;
645
 
646
#endif /* ASM */
647
#endif  /* ndef _PNP_ */

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