OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [sh/] [gensh1/] [startup/] [linkcmds] - Blame information for rev 389

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*
2
 * This is an adapted linker script from egcs-1.0.1
3
 *
4
 * Memory layout for an SH 7032 with main memory in area 2
5
 * This memory layout it very similar to that used for Hitachi's
6
 * EVB with CMON in rom
7
 *
8
 * NOTE: The ram start address may vary, all other start addresses are fixed
9
 *       Not suiteable for gdb's simulator
10
 *
11
 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
12
 *           Bernd Becker (becker@faw.uni-ulm.de)
13
 *
14
 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
15
 *
16
 *  This program is distributed in the hope that it will be useful,
17
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19
 *
20
 *
21
 *  COPYRIGHT (c) 1998.
22
 *  On-Line Applications Research Corporation (OAR).
23
 *  Copyright assigned to U.S. Government, 1994.
24
 *
25
 *  The license and distribution terms for this file may be
26
 *  found in the file LICENSE in this distribution or at
27
 *  http://www.OARcorp.com/rtems/license.html.
28
 *
29
 *  $Id: linkcmds,v 1.2 2001-09-27 12:01:11 chris Exp $
30
 */
31
 
32
OUTPUT_FORMAT("coff-sh")
33
OUTPUT_ARCH(sh)
34
ENTRY(_start)
35
 
36
MEMORY
37
{
38
  rom           : o = 0x00000000, l = 128k
39
  onchip_peri   : o = 0x05000000, l = 512
40
  ram           : o = 0x0A040000, l = 256k
41
 
42
  onchip_ram    : o = 0x0f000000, l = 8k
43
}
44
 
45
SECTIONS
46
{
47
  /* boot vector table */
48
  .monvects 0x00000000 (NOLOAD): {
49
    _monvects = . ;
50
  } > rom
51
 
52
  /* monitor play area */
53
  .monram 0x0A040000 (NOLOAD) :
54
  {
55
  _ramstart = .;
56
  } > ram
57
 
58
  /* monitor vector table */
59
  .vects   0x0A042000 (NOLOAD) : {
60
    _vectab = . ;
61
    *(.vects);
62
  }
63
 
64
  /* Read-only sections, merged into text segment: */
65
 
66
  . = 0x0a044000 ;
67
  .interp        : { *(.interp)         }
68
  .hash          : { *(.hash)           }
69
  .dynsym        : { *(.dynsym)         }
70
  .dynstr        : { *(.dynstr)         }
71
  .gnu.version   : { *(.gnu.version)    }
72
  .gnu.version_d : { *(.gnu.version_d)  }
73
  .gnu.version_r : { *(.gnu.version_r)  }
74
  .rel.text      :
75
    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
76
  .rela.text     :
77
    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
78
  .rel.data      :
79
    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
80
  .rela.data     :
81
    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
82
  .rel.rodata    :
83
    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
84
  .rela.rodata   :
85
    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
86
  .rel.got       : { *(.rel.got)                }
87
  .rela.got      : { *(.rela.got)               }
88
  .rel.ctors     : { *(.rel.ctors)      }
89
  .rela.ctors    : { *(.rela.ctors)     }
90
  .rel.dtors     : { *(.rel.dtors)      }
91
  .rela.dtors    : { *(.rela.dtors)     }
92
  .rel.init      : { *(.rel.init)       }
93
  .rela.init     : { *(.rela.init)      }
94
  .rel.fini      : { *(.rel.fini)       }
95
  .rela.fini     : { *(.rela.fini)      }
96
  .rel.bss       : { *(.rel.bss)                }
97
  .rela.bss      : { *(.rela.bss)               }
98
  .rel.plt       : { *(.rel.plt)                }
99
  .rela.plt      : { *(.rela.plt)               }
100
  .init          : { *(.init)   } =0
101
  .plt           : { *(.plt)    }
102
  .text   .      :
103
  {
104
    *(.text)
105
    *(.stub)
106
    /* .gnu.warning sections are handled specially by elf32.em.  */
107
    *(.gnu.warning)
108
    *(.gnu.linkonce.t*)
109
  } > ram
110
  _etext = .;
111
  PROVIDE (etext = .);
112
  .fini    .  : { *(.fini)    } =0
113
  .rodata  .  : { *(.rodata) *(.gnu.linkonce.r*) }
114
  .rodata1 .  : { *(.rodata1) }
115
  /* Adjust the address for the data segment.  We want to adjust up to
116
     the same address within the page on the next page up.  */
117
  . = ALIGN(128) + (. & (128 - 1));
118
  .data  .  :
119
  {
120
    *(.data)
121
    *(.gnu.linkonce.d*)
122
    CONSTRUCTORS
123
  } > ram
124
  .data1  . : { *(.data1) }
125
  .ctors  .       :
126
  {
127
    ___ctors = .;
128
    *(.ctors)
129
    ___ctors_end = .;
130
  }
131
  .dtors  .       :
132
  {
133
    ___dtors = .;
134
    *(.dtors)
135
    ___dtors_end = .;
136
  }
137
  .got     .      : { *(.got.plt) *(.got) }
138
  .dynamic .      : { *(.dynamic) }
139
  /* We want the small data sections together, so single-instruction offsets
140
     can access them all, and initialized data all before uninitialized, so
141
     we can shorten the on-disk segment size.  */
142
  .sdata   .  : { *(.sdata) }
143
  _edata  =  .;
144
  PROVIDE (edata = .);
145
  __bss_start = .;
146
  .sbss    .  : { *(.sbss) *(.scommon) }
147
  .bss     .  :
148
  {
149
   *(.dynbss)
150
   *(.bss)
151
   *(COMMON)
152
  } > ram
153
  _end = . ;
154
  PROVIDE (end = .);
155
 
156
  _HeapStart = . ;
157
  . = . + 1024 * 20 ;
158
  PROVIDE( _HeapEnd = . );
159
 
160
  _WorkSpaceStart = . ;
161
  . = 0x0a080000 ;
162
  PROVIDE(_WorkSpaceEnd = .);
163
 
164
  _CPU_Interrupt_stack_low  = 0x0f000000 ;
165
  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
166
 
167
  /* Stabs debugging sections.  */
168
  .stab 0 : { *(.stab) }
169
  .stabstr 0 : { *(.stabstr) }
170
  .stab.excl 0 : { *(.stab.excl) }
171
  .stab.exclstr 0 : { *(.stab.exclstr) }
172
  .stab.index 0 : { *(.stab.index) }
173
  .stab.indexstr 0 : { *(.stab.indexstr) }
174
  .comment 0 : { *(.comment) }
175
  /* DWARF debug sections.
176
     Symbols in the DWARF debugging sections are relative to the beginning
177
     of the section so we begin them at 0.  */
178
  /* DWARF 1 */
179
  .debug          0 : { *(.debug) }
180
  .line           0 : { *(.line) }
181
  /* GNU DWARF 1 extensions */
182
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
183
  .debug_sfnames  0 : { *(.debug_sfnames) }
184
  /* DWARF 1.1 and DWARF 2 */
185
  .debug_aranges  0 : { *(.debug_aranges) }
186
  .debug_pubnames 0 : { *(.debug_pubnames) }
187
  /* DWARF 2 */
188
  .debug_info     0 : { *(.debug_info) }
189
  .debug_abbrev   0 : { *(.debug_abbrev) }
190
  .debug_line     0 : { *(.debug_line) }
191
  .debug_frame    0 : { *(.debug_frame) }
192
  .debug_str      0 : { *(.debug_str) }
193
  .debug_loc      0 : { *(.debug_loc) }
194
  .debug_macinfo  0 : { *(.debug_macinfo) }
195
  /* SGI/MIPS DWARF 2 extensions */
196
  .debug_weaknames 0 : { *(.debug_weaknames) }
197
  .debug_funcnames 0 : { *(.debug_funcnames) }
198
  .debug_typenames 0 : { *(.debug_typenames) }
199
  .debug_varnames  0 : { *(.debug_varnames) }
200
 
201
  .stack 0x0f001ff0 : { _stack = .; *(.stack) } > onchip_ram
202
  /* These must appear regardless of  .  */
203
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.