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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libbsp/] [shmdr/] [intr.c] - Blame information for rev 562

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Line No. Rev Author Line
1 30 unneback
/*  void Shm_Cause_interrupt( node )
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 *
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 *  This routine is the shared memory driver routine which
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 *  generates interrupts to other CPUs.
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 *
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 *  It uses the information placed in the node status control
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 *  block by each node.  For example, when used with the Motorola
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 *  MVME136 board, the MPCSR is used.
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 *
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 *  Input parameters:
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 *    node          - destination of this packet (0 = broadcast)
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 *
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 *  Output parameters: NONE
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 *
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 *  COPYRIGHT (c) 1989-1999.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: intr.c,v 1.2 2001-09-27 12:01:12 chris Exp $
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 */
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#include <rtems.h>
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#include "shm_driver.h"
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void Shm_Cause_interrupt(
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  rtems_unsigned32 node
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)
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{
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  Shm_Interrupt_information *intr;
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  rtems_unsigned8  *u8;
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  rtems_unsigned16 *u16;
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  rtems_unsigned32 *u32;
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  rtems_unsigned32  value;
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  intr = &Shm_Interrupt_table[node];
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  value = intr->value;
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  switch ( intr->length ) {
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    case NO_INTERRUPT:
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       break;
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    case BYTE:
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      u8   = (rtems_unsigned8 *)intr->address;
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      *u8  = (rtems_unsigned8) value;
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      break;
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    case WORD:
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      u16   = (rtems_unsigned16 *)intr->address;
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      *u16  = (rtems_unsigned16) value;
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      break;
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    case LONG:
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      u32   = (rtems_unsigned32 *)intr->address;
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      *u32  = (rtems_unsigned32) value;
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      break;
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  }
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}

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