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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libcpu/] [i386/] [registers.h] - Blame information for rev 228

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/* registers.h
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 *
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 *  This file contains definition and constants related to Intel Cpu
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 *
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 *  COPYRIGHT (c) 1998 valette@crf.canon.fr
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: registers.h,v 1.2 2001-09-27 12:01:22 chris Exp $
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 */
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#ifndef _LIBCPU_i386_REGISTERS_H
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#define _LIBCPU_i386_REGISTERS_H
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/*
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 * definition related to EFLAGS
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 */
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#define EFLAGS_CARRY                    0x1
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#define EFLAGS_PARITY                   0x4
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#define EFLAGS_AUX_CARRY                0x10
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#define EFLAGS_ZERO                     0x40
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#define EFLAGS_SIGN                     0x80
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#define EFLAGS_TRAP                     0x100
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#define EFLAGS_INTR_ENABLE              0x200
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#define EFLAGS_DIRECTION                0x400
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#define EFLAGS_OVERFLOW                 0x800
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#define EFLAGS_IOPL_MASK                0x3000
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#define EFLAGS_NESTED_TASK              0x8000
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#define EFLAGS_RESUME                   0x10000
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#define EFLAGS_VIRTUAL_MODE             0x20000
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#define EFLAGS_ALIGN_CHECK              0x40000
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#define EFLAGS_VIRTUAL_INTR             0x80000
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#define EFLAGS_VIRTUAL_INTR_PEND        0x100000
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#define EFLAGS_ID                       0x200000
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/*
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 * definitions related to CR0
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 */
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#define CR0_PROTECTION_ENABLE           0x1
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#define CR0_MONITOR_COPROC              0x2
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#define CR0_COPROC_SOFT_EMUL            0x4
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#define CR0_FLOATING_INSTR_EXCEPTION    0x8
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#define CR0_EXTENSION_TYPE              0x10
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#define CR0_NUMERIC_ERROR               0x20
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#define CR0_WRITE_PROTECT               0x10000
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#define CR0_ALIGMENT_MASK               0x40000
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#define CR0_NO_WRITE_THROUGH            0x20000000
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#define CR0_PAGE_LEVEL_CACHE_DISABLE    0x40000000
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#define CR0_PAGING                      0x80000000
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/*
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 * definitions related to CR3
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 */
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#define CR3_PAGE_CACHE_DISABLE          0x10
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#define CR3_PAGE_WRITE_THROUGH          0x8
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#ifndef ASM
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/*
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 * definition of eflags registers has a bit field structure
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 */
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typedef struct {
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  /*
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   * fist byte : bits 0->7
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   */
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  unsigned int carry                    : 1;
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  unsigned int                          : 1;
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  unsigned int parity                   : 1;
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  unsigned int                          : 1;
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  unsigned int auxiliary_carry          : 1;
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  unsigned int                          : 1;
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  unsigned int zero                     : 1;    /* result is zero */
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  unsigned int sign                     : 1;    /* result is less than zero */
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  /*
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   * Second byte : bits 7->15
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   */
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  unsigned int trap                     : 1;
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  unsigned int intr_enable              : 1;    /* set => intr on */
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  unsigned int direction                : 1;    /* set => autodecrement */
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  unsigned int overflow                 : 1;
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  unsigned int IO_privilege             : 2;
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  unsigned int nested_task              : 1;
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  unsigned int                          : 1;
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  /*
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   * Third byte : bits 15->23
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   */
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  unsigned int resume                   : 1;
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  unsigned int virtual_mode             : 1;
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  unsigned int aligment_check           : 1;
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  unsigned int virtual_intr             : 1;
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  unsigned int virtual_intr_pending     : 1;
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  unsigned int id                       : 1;
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  unsigned int                          : 2;
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  /*
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   * fourth byte : bits 24->31 : UNUSED
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   */
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  unsigned int                          : 8;
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}eflags_bits;
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typedef union {
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  eflags_bits   eflags;
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  unsigned int  i;
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}eflags;
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/*
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 * definition of eflags registers has a bit field structure
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 */
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typedef struct {
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  /*
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   * fist byte : bits 0->7
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   */
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  unsigned int protection_enable        : 1;
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  unsigned int monitor_coproc           : 1;
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  unsigned int coproc_soft_emul         : 1;
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  unsigned int floating_instr_except    : 1;
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  unsigned int extension_type           : 1;
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  unsigned int numeric_error            : 1;
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  unsigned int                          : 2;
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  /*
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   * second byte 8->15 : UNUSED
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   */
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  unsigned int                          : 8;
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  /*
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   * third byte 16->23
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   */
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  unsigned int write_protect            : 1;
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  unsigned int                          : 1;
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  unsigned int aligment_mask            : 1;
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  unsigned int                          : 1;
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  unsigned int                          : 4;
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  /*
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   * fourth byte 24->31
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   */
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  unsigned int                          : 4;
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  unsigned int                          : 1;
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  unsigned int no_write_through         : 1;
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  unsigned int page_level_cache_disable : 1;
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  unsigned int paging   : 1;
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}cr0_bits;
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typedef union {
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  cr0_bits      cr0;
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  unsigned int  i;
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}cr0;
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/*
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 * definition of cr3 registers has a bit field structure
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 */
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typedef struct {
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  unsigned int                          : 3;
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  unsigned int page_write_transparent   : 1;
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  unsigned int page_cache_disable       : 1;
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  unsigned int                          : 7;
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  unsigned int page_directory_base      :20;
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}cr3_bits;
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typedef union {
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  cr3_bits      cr3;
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  unsigned int  i;
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}cr3;
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#endif
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#endif
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