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unneback |
//
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// $Id: do_func.S,v 1.2 2001-09-27 12:01:22 chris Exp $
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//
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// do_func.sa 3.4 2/18/91
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//
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// Do_func performs the unimplemented operation. The operation
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// to be performed is determined from the lower 7 bits of the
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// extension word (except in the case of fmovecr and fsincos).
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// The opcode and tag bits form an index into a jump table in
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// tbldo.sa. Cases of zero, infinity and NaN are handled in
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// do_func by forcing the default result. Normalized and
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// denormalized (there are no unnormalized numbers at this
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// point) are passed onto the emulation code.
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//
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// CMDREG1B and STAG are extracted from the fsave frame
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// and combined to form the table index. The function called
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// will start with a0 pointing to the ETEMP operand. Dyadic
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// functions can find FPTEMP at -12(a0).
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//
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// Called functions return their result in fp0. Sincos returns
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// sin(x) in fp0 and cos(x) in fp1.
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//
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// Copyright (C) Motorola, Inc. 1990
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// All Rights Reserved
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//
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// THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
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// The copyright notice above does not evidence any
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// actual or intended publication of such source code.
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DO_FUNC: //idnt 2,1 | Motorola 040 Floating Point Software Package
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|section 8
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#include "fpsp.defs"
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|xref t_dz2
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|xref t_operr
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|xref t_inx2
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|xref t_resdnrm
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|xref dst_nan
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|xref src_nan
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|xref nrm_set
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|xref sto_cos
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|xref tblpre
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|xref slognp1,slogn,slog10,slog2
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|xref slognd,slog10d,slog2d
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|xref smod,srem
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|xref sscale
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|xref smovcr
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PONE: .long 0x3fff0000,0x80000000,0x00000000 //+1
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MONE: .long 0xbfff0000,0x80000000,0x00000000 //-1
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PZERO: .long 0x00000000,0x00000000,0x00000000 //+0
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MZERO: .long 0x80000000,0x00000000,0x00000000 //-0
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PINF: .long 0x7fff0000,0x00000000,0x00000000 //+inf
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MINF: .long 0xffff0000,0x00000000,0x00000000 //-inf
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QNAN: .long 0x7fff0000,0xffffffff,0xffffffff //non-signaling nan
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PPIBY2: .long 0x3FFF0000,0xC90FDAA2,0x2168C235 //+PI/2
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MPIBY2: .long 0xbFFF0000,0xC90FDAA2,0x2168C235 //-PI/2
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.global do_func
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do_func:
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clrb CU_ONLY(%a6)
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//
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// Check for fmovecr. It does not follow the format of fp gen
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// unimplemented instructions. The test is on the upper 6 bits;
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// if they are $17, the inst is fmovecr. Call entry smovcr
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// directly.
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//
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bfextu CMDREG1B(%a6){#0:#6},%d0 //get opclass and src fields
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cmpil #0x17,%d0 //if op class and size fields are $17,
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// ;it is FMOVECR; if not, continue
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bnes not_fmovecr
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jmp smovcr //fmovecr; jmp directly to emulation
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not_fmovecr:
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movew CMDREG1B(%a6),%d0
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andl #0x7F,%d0
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cmpil #0x38,%d0 //if the extension is >= $38,
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bge serror //it is illegal
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bfextu STAG(%a6){#0:#3},%d1
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lsll #3,%d0 //make room for STAG
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addl %d1,%d0 //combine for final index into table
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leal tblpre,%a1 //start of monster jump table
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movel (%a1,%d0.w*4),%a1 //real target address
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leal ETEMP(%a6),%a0 //a0 is pointer to src op
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movel USER_FPCR(%a6),%d1
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andl #0xFF,%d1 // discard all but rounding mode/prec
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fmovel #0,%fpcr
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jmp (%a1)
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//
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// ERROR
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//
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.global serror
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serror:
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st STORE_FLG(%a6)
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rts
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//
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// These routines load forced values into fp0. They are called
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// by index into tbldo.
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//
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// Load a signed zero to fp0 and set inex2/ainex
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//
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.global snzrinx
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snzrinx:
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btstb #sign_bit,LOCAL_EX(%a0) //get sign of source operand
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bnes ld_mzinx //if negative, branch
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bsr ld_pzero //bsr so we can return and set inx
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bra t_inx2 //now, set the inx for the next inst
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ld_mzinx:
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bsr ld_mzero //if neg, load neg zero, return here
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bra t_inx2 //now, set the inx for the next inst
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//
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// Load a signed zero to fp0; do not set inex2/ainex
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//
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.global szero
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szero:
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btstb #sign_bit,LOCAL_EX(%a0) //get sign of source operand
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bne ld_mzero //if neg, load neg zero
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bra ld_pzero //load positive zero
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//
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// Load a signed infinity to fp0; do not set inex2/ainex
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//
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.global sinf
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sinf:
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btstb #sign_bit,LOCAL_EX(%a0) //get sign of source operand
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bne ld_minf //if negative branch
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bra ld_pinf
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//
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// Load a signed one to fp0; do not set inex2/ainex
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//
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.global sone
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sone:
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btstb #sign_bit,LOCAL_EX(%a0) //check sign of source
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bne ld_mone
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bra ld_pone
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//
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// Load a signed pi/2 to fp0; do not set inex2/ainex
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//
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.global spi_2
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spi_2:
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btstb #sign_bit,LOCAL_EX(%a0) //check sign of source
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bne ld_mpi2
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bra ld_ppi2
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//
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// Load either a +0 or +inf for plus/minus operand
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//
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.global szr_inf
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szr_inf:
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btstb #sign_bit,LOCAL_EX(%a0) //check sign of source
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bne ld_pzero
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bra ld_pinf
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//
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// Result is either an operr or +inf for plus/minus operand
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// [Used by slogn, slognp1, slog10, and slog2]
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//
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.global sopr_inf
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sopr_inf:
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btstb #sign_bit,LOCAL_EX(%a0) //check sign of source
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bne t_operr
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bra ld_pinf
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//
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// FLOGNP1
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//
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.global sslognp1
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sslognp1:
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fmovemx (%a0),%fp0-%fp0
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fcmpb #-1,%fp0
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fbgt slognp1
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fbeq t_dz2 //if = -1, divide by zero exception
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fmovel #0,%FPSR //clr N flag
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bra t_operr //take care of operands < -1
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//
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// FETOXM1
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//
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.global setoxm1i
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setoxm1i:
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btstb #sign_bit,LOCAL_EX(%a0) //check sign of source
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bne ld_mone
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bra ld_pinf
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//
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// FLOGN
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//
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// Test for 1.0 as an input argument, returning +zero. Also check
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| 187 |
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// the sign and return operr if negative.
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//
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| 189 |
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.global sslogn
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sslogn:
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| 191 |
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btstb #sign_bit,LOCAL_EX(%a0)
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bne t_operr //take care of operands < 0
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cmpiw #0x3fff,LOCAL_EX(%a0) //test for 1.0 input
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bne slogn
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cmpil #0x80000000,LOCAL_HI(%a0)
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bne slogn
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tstl LOCAL_LO(%a0)
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bne slogn
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fmovex PZERO,%fp0
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rts
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| 201 |
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| 202 |
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.global sslognd
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| 203 |
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sslognd:
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btstb #sign_bit,LOCAL_EX(%a0)
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beq slognd
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bra t_operr //take care of operands < 0
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| 207 |
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//
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| 209 |
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// FLOG10
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| 210 |
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//
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| 211 |
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.global sslog10
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sslog10:
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| 213 |
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btstb #sign_bit,LOCAL_EX(%a0)
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bne t_operr //take care of operands < 0
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cmpiw #0x3fff,LOCAL_EX(%a0) //test for 1.0 input
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| 216 |
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bne slog10
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| 217 |
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cmpil #0x80000000,LOCAL_HI(%a0)
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bne slog10
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| 219 |
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tstl LOCAL_LO(%a0)
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| 220 |
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bne slog10
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| 221 |
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fmovex PZERO,%fp0
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| 222 |
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rts
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| 223 |
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| 224 |
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.global sslog10d
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| 225 |
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sslog10d:
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| 226 |
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btstb #sign_bit,LOCAL_EX(%a0)
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| 227 |
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beq slog10d
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| 228 |
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bra t_operr //take care of operands < 0
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| 229 |
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| 230 |
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//
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| 231 |
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// FLOG2
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| 232 |
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//
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| 233 |
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.global sslog2
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| 234 |
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sslog2:
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| 235 |
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btstb #sign_bit,LOCAL_EX(%a0)
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| 236 |
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bne t_operr //take care of operands < 0
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| 237 |
|
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cmpiw #0x3fff,LOCAL_EX(%a0) //test for 1.0 input
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| 238 |
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bne slog2
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| 239 |
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cmpil #0x80000000,LOCAL_HI(%a0)
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| 240 |
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bne slog2
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| 241 |
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tstl LOCAL_LO(%a0)
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| 242 |
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bne slog2
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| 243 |
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fmovex PZERO,%fp0
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| 244 |
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rts
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| 245 |
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| 246 |
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.global sslog2d
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| 247 |
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sslog2d:
|
| 248 |
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btstb #sign_bit,LOCAL_EX(%a0)
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| 249 |
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beq slog2d
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| 250 |
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bra t_operr //take care of operands < 0
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| 251 |
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| 252 |
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//
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| 253 |
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// FMOD
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| 254 |
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//
|
| 255 |
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pmodt:
|
| 256 |
|
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// ;$21 fmod
|
| 257 |
|
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// ;dtag,stag
|
| 258 |
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.long smod // 00,00 norm,norm = normal
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| 259 |
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.long smod_oper // 00,01 norm,zero = nan with operr
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| 260 |
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.long smod_fpn // 00,10 norm,inf = fpn
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| 261 |
|
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.long smod_snan // 00,11 norm,nan = nan
|
| 262 |
|
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.long smod_zro // 01,00 zero,norm = +-zero
|
| 263 |
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.long smod_oper // 01,01 zero,zero = nan with operr
|
| 264 |
|
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.long smod_zro // 01,10 zero,inf = +-zero
|
| 265 |
|
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.long smod_snan // 01,11 zero,nan = nan
|
| 266 |
|
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.long smod_oper // 10,00 inf,norm = nan with operr
|
| 267 |
|
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.long smod_oper // 10,01 inf,zero = nan with operr
|
| 268 |
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.long smod_oper // 10,10 inf,inf = nan with operr
|
| 269 |
|
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.long smod_snan // 10,11 inf,nan = nan
|
| 270 |
|
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.long smod_dnan // 11,00 nan,norm = nan
|
| 271 |
|
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.long smod_dnan // 11,01 nan,zero = nan
|
| 272 |
|
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.long smod_dnan // 11,10 nan,inf = nan
|
| 273 |
|
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.long smod_dnan // 11,11 nan,nan = nan
|
| 274 |
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|
| 275 |
|
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.global pmod
|
| 276 |
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pmod:
|
| 277 |
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clrb FPSR_QBYTE(%a6) // clear quotient field
|
| 278 |
|
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bfextu STAG(%a6){#0:#3},%d0 //stag = d0
|
| 279 |
|
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bfextu DTAG(%a6){#0:#3},%d1 //dtag = d1
|
| 280 |
|
|
|
| 281 |
|
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//
|
| 282 |
|
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// Alias extended denorms to norms for the jump table.
|
| 283 |
|
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//
|
| 284 |
|
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bclrl #2,%d0
|
| 285 |
|
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bclrl #2,%d1
|
| 286 |
|
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|
| 287 |
|
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lslb #2,%d1
|
| 288 |
|
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orb %d0,%d1 //d1{3:2} = dtag, d1{1:0} = stag
|
| 289 |
|
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// ;Tag values:
|
| 290 |
|
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// ;00 = norm or denorm
|
| 291 |
|
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// ;01 = zero
|
| 292 |
|
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// ;10 = inf
|
| 293 |
|
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// ;11 = nan
|
| 294 |
|
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lea pmodt,%a1
|
| 295 |
|
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movel (%a1,%d1.w*4),%a1
|
| 296 |
|
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jmp (%a1)
|
| 297 |
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|
| 298 |
|
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smod_snan:
|
| 299 |
|
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bra src_nan
|
| 300 |
|
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smod_dnan:
|
| 301 |
|
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bra dst_nan
|
| 302 |
|
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smod_oper:
|
| 303 |
|
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bra t_operr
|
| 304 |
|
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smod_zro:
|
| 305 |
|
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moveb ETEMP(%a6),%d1 //get sign of src op
|
| 306 |
|
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moveb FPTEMP(%a6),%d0 //get sign of dst op
|
| 307 |
|
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eorb %d0,%d1 //get exor of sign bits
|
| 308 |
|
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btstl #7,%d1 //test for sign
|
| 309 |
|
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beqs smod_zsn //if clr, do not set sign big
|
| 310 |
|
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bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit
|
| 311 |
|
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smod_zsn:
|
| 312 |
|
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btstl #7,%d0 //test if + or -
|
| 313 |
|
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beq ld_pzero //if pos then load +0
|
| 314 |
|
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bra ld_mzero //else neg load -0
|
| 315 |
|
|
|
| 316 |
|
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smod_fpn:
|
| 317 |
|
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moveb ETEMP(%a6),%d1 //get sign of src op
|
| 318 |
|
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moveb FPTEMP(%a6),%d0 //get sign of dst op
|
| 319 |
|
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eorb %d0,%d1 //get exor of sign bits
|
| 320 |
|
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btstl #7,%d1 //test for sign
|
| 321 |
|
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beqs smod_fsn //if clr, do not set sign big
|
| 322 |
|
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bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit
|
| 323 |
|
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smod_fsn:
|
| 324 |
|
|
tstb DTAG(%a6) //filter out denormal destination case
|
| 325 |
|
|
bpls smod_nrm //
|
| 326 |
|
|
leal FPTEMP(%a6),%a0 //a0<- addr(FPTEMP)
|
| 327 |
|
|
bra t_resdnrm //force UNFL(but exact) result
|
| 328 |
|
|
smod_nrm:
|
| 329 |
|
|
fmovel USER_FPCR(%a6),%fpcr //use user's rmode and precision
|
| 330 |
|
|
fmovex FPTEMP(%a6),%fp0 //return dest to fp0
|
| 331 |
|
|
rts
|
| 332 |
|
|
|
| 333 |
|
|
//
|
| 334 |
|
|
// FREM
|
| 335 |
|
|
//
|
| 336 |
|
|
premt:
|
| 337 |
|
|
// ;$25 frem
|
| 338 |
|
|
// ;dtag,stag
|
| 339 |
|
|
.long srem // 00,00 norm,norm = normal
|
| 340 |
|
|
.long srem_oper // 00,01 norm,zero = nan with operr
|
| 341 |
|
|
.long srem_fpn // 00,10 norm,inf = fpn
|
| 342 |
|
|
.long srem_snan // 00,11 norm,nan = nan
|
| 343 |
|
|
.long srem_zro // 01,00 zero,norm = +-zero
|
| 344 |
|
|
.long srem_oper // 01,01 zero,zero = nan with operr
|
| 345 |
|
|
.long srem_zro // 01,10 zero,inf = +-zero
|
| 346 |
|
|
.long srem_snan // 01,11 zero,nan = nan
|
| 347 |
|
|
.long srem_oper // 10,00 inf,norm = nan with operr
|
| 348 |
|
|
.long srem_oper // 10,01 inf,zero = nan with operr
|
| 349 |
|
|
.long srem_oper // 10,10 inf,inf = nan with operr
|
| 350 |
|
|
.long srem_snan // 10,11 inf,nan = nan
|
| 351 |
|
|
.long srem_dnan // 11,00 nan,norm = nan
|
| 352 |
|
|
.long srem_dnan // 11,01 nan,zero = nan
|
| 353 |
|
|
.long srem_dnan // 11,10 nan,inf = nan
|
| 354 |
|
|
.long srem_dnan // 11,11 nan,nan = nan
|
| 355 |
|
|
|
| 356 |
|
|
.global prem
|
| 357 |
|
|
prem:
|
| 358 |
|
|
clrb FPSR_QBYTE(%a6) //clear quotient field
|
| 359 |
|
|
bfextu STAG(%a6){#0:#3},%d0 //stag = d0
|
| 360 |
|
|
bfextu DTAG(%a6){#0:#3},%d1 //dtag = d1
|
| 361 |
|
|
//
|
| 362 |
|
|
// Alias extended denorms to norms for the jump table.
|
| 363 |
|
|
//
|
| 364 |
|
|
bclr #2,%d0
|
| 365 |
|
|
bclr #2,%d1
|
| 366 |
|
|
|
| 367 |
|
|
lslb #2,%d1
|
| 368 |
|
|
orb %d0,%d1 //d1{3:2} = dtag, d1{1:0} = stag
|
| 369 |
|
|
// ;Tag values:
|
| 370 |
|
|
// ;00 = norm or denorm
|
| 371 |
|
|
// ;01 = zero
|
| 372 |
|
|
// ;10 = inf
|
| 373 |
|
|
// ;11 = nan
|
| 374 |
|
|
lea premt,%a1
|
| 375 |
|
|
movel (%a1,%d1.w*4),%a1
|
| 376 |
|
|
jmp (%a1)
|
| 377 |
|
|
|
| 378 |
|
|
srem_snan:
|
| 379 |
|
|
bra src_nan
|
| 380 |
|
|
srem_dnan:
|
| 381 |
|
|
bra dst_nan
|
| 382 |
|
|
srem_oper:
|
| 383 |
|
|
bra t_operr
|
| 384 |
|
|
srem_zro:
|
| 385 |
|
|
moveb ETEMP(%a6),%d1 //get sign of src op
|
| 386 |
|
|
moveb FPTEMP(%a6),%d0 //get sign of dst op
|
| 387 |
|
|
eorb %d0,%d1 //get exor of sign bits
|
| 388 |
|
|
btstl #7,%d1 //test for sign
|
| 389 |
|
|
beqs srem_zsn //if clr, do not set sign big
|
| 390 |
|
|
bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit
|
| 391 |
|
|
srem_zsn:
|
| 392 |
|
|
btstl #7,%d0 //test if + or -
|
| 393 |
|
|
beq ld_pzero //if pos then load +0
|
| 394 |
|
|
bra ld_mzero //else neg load -0
|
| 395 |
|
|
|
| 396 |
|
|
srem_fpn:
|
| 397 |
|
|
moveb ETEMP(%a6),%d1 //get sign of src op
|
| 398 |
|
|
moveb FPTEMP(%a6),%d0 //get sign of dst op
|
| 399 |
|
|
eorb %d0,%d1 //get exor of sign bits
|
| 400 |
|
|
btstl #7,%d1 //test for sign
|
| 401 |
|
|
beqs srem_fsn //if clr, do not set sign big
|
| 402 |
|
|
bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit
|
| 403 |
|
|
srem_fsn:
|
| 404 |
|
|
tstb DTAG(%a6) //filter out denormal destination case
|
| 405 |
|
|
bpls srem_nrm //
|
| 406 |
|
|
leal FPTEMP(%a6),%a0 //a0<- addr(FPTEMP)
|
| 407 |
|
|
bra t_resdnrm //force UNFL(but exact) result
|
| 408 |
|
|
srem_nrm:
|
| 409 |
|
|
fmovel USER_FPCR(%a6),%fpcr //use user's rmode and precision
|
| 410 |
|
|
fmovex FPTEMP(%a6),%fp0 //return dest to fp0
|
| 411 |
|
|
rts
|
| 412 |
|
|
//
|
| 413 |
|
|
// FSCALE
|
| 414 |
|
|
//
|
| 415 |
|
|
pscalet:
|
| 416 |
|
|
// ;$26 fscale
|
| 417 |
|
|
// ;dtag,stag
|
| 418 |
|
|
.long sscale // 00,00 norm,norm = result
|
| 419 |
|
|
.long sscale // 00,01 norm,zero = fpn
|
| 420 |
|
|
.long scl_opr // 00,10 norm,inf = nan with operr
|
| 421 |
|
|
.long scl_snan // 00,11 norm,nan = nan
|
| 422 |
|
|
.long scl_zro // 01,00 zero,norm = +-zero
|
| 423 |
|
|
.long scl_zro // 01,01 zero,zero = +-zero
|
| 424 |
|
|
.long scl_opr // 01,10 zero,inf = nan with operr
|
| 425 |
|
|
.long scl_snan // 01,11 zero,nan = nan
|
| 426 |
|
|
.long scl_inf // 10,00 inf,norm = +-inf
|
| 427 |
|
|
.long scl_inf // 10,01 inf,zero = +-inf
|
| 428 |
|
|
.long scl_opr // 10,10 inf,inf = nan with operr
|
| 429 |
|
|
.long scl_snan // 10,11 inf,nan = nan
|
| 430 |
|
|
.long scl_dnan // 11,00 nan,norm = nan
|
| 431 |
|
|
.long scl_dnan // 11,01 nan,zero = nan
|
| 432 |
|
|
.long scl_dnan // 11,10 nan,inf = nan
|
| 433 |
|
|
.long scl_dnan // 11,11 nan,nan = nan
|
| 434 |
|
|
|
| 435 |
|
|
.global pscale
|
| 436 |
|
|
pscale:
|
| 437 |
|
|
bfextu STAG(%a6){#0:#3},%d0 //stag in d0
|
| 438 |
|
|
bfextu DTAG(%a6){#0:#3},%d1 //dtag in d1
|
| 439 |
|
|
bclrl #2,%d0 //alias denorm into norm
|
| 440 |
|
|
bclrl #2,%d1 //alias denorm into norm
|
| 441 |
|
|
lslb #2,%d1
|
| 442 |
|
|
orb %d0,%d1 //d1{4:2} = dtag, d1{1:0} = stag
|
| 443 |
|
|
// ;dtag values stag values:
|
| 444 |
|
|
// ;000 = norm 00 = norm
|
| 445 |
|
|
// ;001 = zero 01 = zero
|
| 446 |
|
|
// ;010 = inf 10 = inf
|
| 447 |
|
|
// ;011 = nan 11 = nan
|
| 448 |
|
|
// ;100 = dnrm
|
| 449 |
|
|
//
|
| 450 |
|
|
//
|
| 451 |
|
|
leal pscalet,%a1 //load start of jump table
|
| 452 |
|
|
movel (%a1,%d1.w*4),%a1 //load a1 with label depending on tag
|
| 453 |
|
|
jmp (%a1) //go to the routine
|
| 454 |
|
|
|
| 455 |
|
|
scl_opr:
|
| 456 |
|
|
bra t_operr
|
| 457 |
|
|
|
| 458 |
|
|
scl_dnan:
|
| 459 |
|
|
bra dst_nan
|
| 460 |
|
|
|
| 461 |
|
|
scl_zro:
|
| 462 |
|
|
btstb #sign_bit,FPTEMP_EX(%a6) //test if + or -
|
| 463 |
|
|
beq ld_pzero //if pos then load +0
|
| 464 |
|
|
bra ld_mzero //if neg then load -0
|
| 465 |
|
|
scl_inf:
|
| 466 |
|
|
btstb #sign_bit,FPTEMP_EX(%a6) //test if + or -
|
| 467 |
|
|
beq ld_pinf //if pos then load +inf
|
| 468 |
|
|
bra ld_minf //else neg load -inf
|
| 469 |
|
|
scl_snan:
|
| 470 |
|
|
bra src_nan
|
| 471 |
|
|
//
|
| 472 |
|
|
// FSINCOS
|
| 473 |
|
|
//
|
| 474 |
|
|
.global ssincosz
|
| 475 |
|
|
ssincosz:
|
| 476 |
|
|
btstb #sign_bit,ETEMP(%a6) //get sign
|
| 477 |
|
|
beqs sincosp
|
| 478 |
|
|
fmovex MZERO,%fp0
|
| 479 |
|
|
bras sincoscom
|
| 480 |
|
|
sincosp:
|
| 481 |
|
|
fmovex PZERO,%fp0
|
| 482 |
|
|
sincoscom:
|
| 483 |
|
|
fmovemx PONE,%fp1-%fp1 //do not allow FPSR to be affected
|
| 484 |
|
|
bra sto_cos //store cosine result
|
| 485 |
|
|
|
| 486 |
|
|
.global ssincosi
|
| 487 |
|
|
ssincosi:
|
| 488 |
|
|
fmovex QNAN,%fp1 //load NAN
|
| 489 |
|
|
bsr sto_cos //store cosine result
|
| 490 |
|
|
fmovex QNAN,%fp0 //load NAN
|
| 491 |
|
|
bra t_operr
|
| 492 |
|
|
|
| 493 |
|
|
.global ssincosnan
|
| 494 |
|
|
ssincosnan:
|
| 495 |
|
|
movel ETEMP_EX(%a6),FP_SCR1(%a6)
|
| 496 |
|
|
movel ETEMP_HI(%a6),FP_SCR1+4(%a6)
|
| 497 |
|
|
movel ETEMP_LO(%a6),FP_SCR1+8(%a6)
|
| 498 |
|
|
bsetb #signan_bit,FP_SCR1+4(%a6)
|
| 499 |
|
|
fmovemx FP_SCR1(%a6),%fp1-%fp1
|
| 500 |
|
|
bsr sto_cos
|
| 501 |
|
|
bra src_nan
|
| 502 |
|
|
//
|
| 503 |
|
|
// This code forces default values for the zero, inf, and nan cases
|
| 504 |
|
|
// in the transcendentals code. The CC bits must be set in the
|
| 505 |
|
|
// stacked FPSR to be correctly reported.
|
| 506 |
|
|
//
|
| 507 |
|
|
//**Returns +PI/2
|
| 508 |
|
|
.global ld_ppi2
|
| 509 |
|
|
ld_ppi2:
|
| 510 |
|
|
fmovex PPIBY2,%fp0 //load +pi/2
|
| 511 |
|
|
bra t_inx2 //set inex2 exc
|
| 512 |
|
|
|
| 513 |
|
|
//**Returns -PI/2
|
| 514 |
|
|
.global ld_mpi2
|
| 515 |
|
|
ld_mpi2:
|
| 516 |
|
|
fmovex MPIBY2,%fp0 //load -pi/2
|
| 517 |
|
|
orl #neg_mask,USER_FPSR(%a6) //set N bit
|
| 518 |
|
|
bra t_inx2 //set inex2 exc
|
| 519 |
|
|
|
| 520 |
|
|
//**Returns +inf
|
| 521 |
|
|
.global ld_pinf
|
| 522 |
|
|
ld_pinf:
|
| 523 |
|
|
fmovex PINF,%fp0 //load +inf
|
| 524 |
|
|
orl #inf_mask,USER_FPSR(%a6) //set I bit
|
| 525 |
|
|
rts
|
| 526 |
|
|
|
| 527 |
|
|
//**Returns -inf
|
| 528 |
|
|
.global ld_minf
|
| 529 |
|
|
ld_minf:
|
| 530 |
|
|
fmovex MINF,%fp0 //load -inf
|
| 531 |
|
|
orl #neg_mask+inf_mask,USER_FPSR(%a6) //set N and I bits
|
| 532 |
|
|
rts
|
| 533 |
|
|
|
| 534 |
|
|
//**Returns +1
|
| 535 |
|
|
.global ld_pone
|
| 536 |
|
|
ld_pone:
|
| 537 |
|
|
fmovex PONE,%fp0 //load +1
|
| 538 |
|
|
rts
|
| 539 |
|
|
|
| 540 |
|
|
//**Returns -1
|
| 541 |
|
|
.global ld_mone
|
| 542 |
|
|
ld_mone:
|
| 543 |
|
|
fmovex MONE,%fp0 //load -1
|
| 544 |
|
|
orl #neg_mask,USER_FPSR(%a6) //set N bit
|
| 545 |
|
|
rts
|
| 546 |
|
|
|
| 547 |
|
|
//**Returns +0
|
| 548 |
|
|
.global ld_pzero
|
| 549 |
|
|
ld_pzero:
|
| 550 |
|
|
fmovex PZERO,%fp0 //load +0
|
| 551 |
|
|
orl #z_mask,USER_FPSR(%a6) //set Z bit
|
| 552 |
|
|
rts
|
| 553 |
|
|
|
| 554 |
|
|
//**Returns -0
|
| 555 |
|
|
.global ld_mzero
|
| 556 |
|
|
ld_mzero:
|
| 557 |
|
|
fmovex MZERO,%fp0 //load -0
|
| 558 |
|
|
orl #neg_mask+z_mask,USER_FPSR(%a6) //set N and Z bits
|
| 559 |
|
|
rts
|
| 560 |
|
|
|
| 561 |
|
|
|end
|
