OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libcpu/] [powerpc/] [mpc6xx/] [exceptions/] [raw_exception.c] - Blame information for rev 30

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 30 unneback
/*
2
 * raw_exception.c  - This file contains implementation of C function to
3
 *                    Instanciate 60x ppc primary exception entries.
4
 *                    More detailled information can be found on motorola
5
 *                    site and more precisely in the following book :
6
 *
7
 *                    MPC750
8
 *                    Risc Microporcessor User's Manual
9
 *                    Motorola REF : MPC750UM/AD 8/97
10
 *
11
 * Copyright (C) 1999  Eric Valette (valette@crf.canon.fr)
12
 *                     Canon Centre Recherche France.
13
 *
14
 * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
15
 * to support 603, 603e, 604, 604e exceptions
16
 *
17
 *  The license and distribution terms for this file may be
18
 *  found in found in the file LICENSE in this distribution or at
19
 *  http://www.OARcorp.com/rtems/license.html.
20
 *
21
 * $Id: raw_exception.c,v 1.2 2001-09-27 12:01:25 chris Exp $
22
 */
23
#include <rtems/score/targopts.h>
24
#include <rtems/score/ppc.h>
25
#include <rtems/system.h>
26
#include <rtems/score/cpu.h>
27
#include <libcpu/raw_exception.h>
28
#include <libcpu/cpu.h>
29
 
30
static rtems_raw_except_connect_data*           raw_except_table;
31
static rtems_raw_except_connect_data            default_raw_except_entry;
32
static rtems_raw_except_global_settings*        local_settings;
33
 
34
int mpc750_vector_is_valid(rtems_vector vector)
35
{
36
  switch(vector) {
37
  case ASM_RESET_VECTOR: /* fall through */
38
  case ASM_MACH_VECTOR:
39
  case ASM_PROT_VECTOR:
40
  case ASM_ISI_VECTOR:
41
  case ASM_EXT_VECTOR:
42
  case ASM_ALIGN_VECTOR:
43
  case ASM_PROG_VECTOR:
44
  case ASM_FLOAT_VECTOR:
45
  case ASM_DEC_VECTOR:
46
  case ASM_SYS_VECTOR:
47
  case ASM_TRACE_VECTOR:
48
  case ASM_ADDR_VECTOR:
49
  case ASM_SYSMGMT_VECTOR:
50
  case ASM_ITM_VECTOR:
51
    return 1;
52
  default: return 0;
53
  }
54
}
55
 
56
int mpc603_vector_is_valid(rtems_vector vector)
57
{
58
  switch(vector) {
59
  case ASM_RESET_VECTOR: /* fall through */
60
  case ASM_MACH_VECTOR:
61
  case ASM_PROT_VECTOR:
62
  case ASM_ISI_VECTOR:
63
  case ASM_EXT_VECTOR:
64
  case ASM_ALIGN_VECTOR:
65
  case ASM_PROG_VECTOR:
66
  case ASM_FLOAT_VECTOR:
67
  case ASM_DEC_VECTOR:
68
  case ASM_SYS_VECTOR:
69
  case ASM_TRACE_VECTOR:
70
    return 1;
71
  case ASM_PERFMON_VECTOR:
72
    return 0;
73
  case ASM_IMISS_VECTOR: /* fall through */
74
  case ASM_DLMISS_VECTOR:
75
  case ASM_DSMISS_VECTOR:
76
  case ASM_ADDR_VECTOR:
77
  case ASM_SYSMGMT_VECTOR:
78
    return 1;
79
  case ASM_ITM_VECTOR:
80
    return 0;
81
  }
82
  return 0;
83
}
84
 
85
int mpc604_vector_is_valid(rtems_vector vector)
86
{
87
  switch(vector) {
88
  case ASM_RESET_VECTOR: /* fall through */
89
  case ASM_MACH_VECTOR:
90
  case ASM_PROT_VECTOR:
91
  case ASM_ISI_VECTOR:
92
  case ASM_EXT_VECTOR:
93
  case ASM_ALIGN_VECTOR:
94
  case ASM_PROG_VECTOR:
95
  case ASM_FLOAT_VECTOR:
96
  case ASM_DEC_VECTOR:
97
  case ASM_SYS_VECTOR:
98
  case ASM_TRACE_VECTOR:
99
  case ASM_PERFMON_VECTOR:
100
    return 1;
101
  case ASM_IMISS_VECTOR: /* fall through */
102
  case ASM_DLMISS_VECTOR:
103
  case ASM_DSMISS_VECTOR:
104
    return 0;
105
  case ASM_ADDR_VECTOR: /* fall through */
106
  case ASM_SYSMGMT_VECTOR:
107
    return 1;
108
  case ASM_ITM_VECTOR:
109
    return 0;
110
  }
111
  return 0;
112
}
113
 
114
int mpc60x_set_exception  (const rtems_raw_except_connect_data* except)
115
{
116
    unsigned int level;
117
 
118
    switch (current_ppc_cpu) {
119
        case PPC_750:
120
            if (!mpc750_vector_is_valid(except->exceptIndex)) {
121
                return 0;
122
            }
123
            break;
124
        case PPC_604:
125
        case PPC_604e:
126
        case PPC_604r:
127
            if (!mpc604_vector_is_valid(except->exceptIndex)) {
128
                return 0;
129
            }
130
            break;
131
        case PPC_603:
132
        case PPC_603e:
133
            if (!mpc603_vector_is_valid(except->exceptIndex)) {
134
                return 0;
135
            }
136
            break;
137
        default:
138
            printk("Please complete libcpu/powerpc/mpc6xx/raw_exception.c\n");
139
            printk("current_ppc_cpu = %x\n", current_ppc_cpu);
140
            return 0;
141
    }
142
 
143
    /*
144
     * Check if default handler is actually connected. If not issue an error.
145
     * You must first get the current handler via mpc60x_get_current_exception
146
     * and then disconnect it using mpc60x_delete_exception.
147
     * RATIONALE : to always have the same transition by forcing the user
148
     * to get the previous handler before accepting to disconnect.
149
     */
150
    if (memcmp(mpc60x_get_vector_addr(except->exceptIndex), (void*)default_raw_except_entry.hdl.raw_hdl,default_raw_except_entry.hdl.raw_hdl_size)) {
151
      return 0;
152
    }
153
 
154
    _CPU_ISR_Disable(level);
155
 
156
    raw_except_table [except->exceptIndex] = *except;
157
    codemove((void*)mpc60x_get_vector_addr(except->exceptIndex),
158
             except->hdl.raw_hdl,
159
             except->hdl.raw_hdl_size,
160
             PPC_CACHE_ALIGNMENT);
161
    except->on(except);
162
 
163
    _CPU_ISR_Enable(level);
164
    return 1;
165
}
166
 
167
int mpc60x_get_current_exception (rtems_raw_except_connect_data* except)
168
{
169
  if (!mpc750_vector_is_valid(except->exceptIndex)){
170
    return 0;
171
  }
172
 
173
  *except = raw_except_table [except->exceptIndex];
174
 
175
  return 1;
176
}
177
 
178
int mpc60x_delete_exception (const rtems_raw_except_connect_data* except)
179
{
180
  unsigned int level;
181
 
182
  if (!mpc750_vector_is_valid(except->exceptIndex)){
183
    return 0;
184
  }
185
  /*
186
   * Check if handler passed is actually connected. If not issue an error.
187
   * You must first get the current handler via mpc60x_get_current_exception
188
   * and then disconnect it using mpc60x_delete_exception.
189
   * RATIONALE : to always have the same transition by forcing the user
190
   * to get the previous handler before accepting to disconnect.
191
   */
192
  if (memcmp(mpc60x_get_vector_addr(except->exceptIndex),
193
             (void*)except->hdl.raw_hdl,
194
             except->hdl.raw_hdl_size)) {
195
      return 0;
196
  }
197
  _CPU_ISR_Disable(level);
198
 
199
  except->off(except);
200
  codemove((void*)mpc60x_get_vector_addr(except->exceptIndex),
201
           default_raw_except_entry.hdl.raw_hdl,
202
           default_raw_except_entry.hdl.raw_hdl_size,
203
           PPC_CACHE_ALIGNMENT);
204
 
205
 
206
  raw_except_table[except->exceptIndex] = default_raw_except_entry;
207
  raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
208
 
209
  _CPU_ISR_Enable(level);
210
 
211
  return 1;
212
}
213
 
214
/*
215
 * Exception global init.
216
 */
217
int mpc60x_init_exceptions (rtems_raw_except_global_settings* config)
218
{
219
    unsigned                    i;
220
    unsigned int level;
221
 
222
    /*
223
     * store various accelerators
224
     */
225
    raw_except_table            = config->rawExceptHdlTbl;
226
    local_settings              = config;
227
    default_raw_except_entry    = config->defaultRawEntry;
228
 
229
    _CPU_ISR_Disable(level);
230
 
231
    for (i=0; i <= LAST_VALID_EXC; i++) {
232
      if (!mpc750_vector_is_valid(i)){
233
        continue;
234
      }
235
      codemove((void*)mpc60x_get_vector_addr(i),
236
             raw_except_table[i].hdl.raw_hdl,
237
             raw_except_table[i].hdl.raw_hdl_size,
238
             PPC_CACHE_ALIGNMENT);
239
      if (raw_except_table[i].hdl.raw_hdl != default_raw_except_entry.hdl.raw_hdl) {
240
        raw_except_table[i].on(&raw_except_table[i]);
241
      }
242
      else {
243
        raw_except_table[i].off(&raw_except_table[i]);
244
      }
245
    }
246
    _CPU_ISR_Enable(level);
247
 
248
    return 1;
249
}
250
 
251
int mpc60x_get_exception_config (rtems_raw_except_global_settings** config)
252
{
253
  *config = local_settings;
254
  return 1;
255
}
256
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.