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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libcpu/] [powerpc/] [mpc6xx/] [exceptions/] [raw_exception.c] - Blame information for rev 30

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1 30 unneback 
/*
2 
 * raw_exception.c  - This file contains implementation of C function to
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 *                    Instanciate 60x ppc primary exception entries.
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 *                    More detailled information can be found on motorola
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 *                    site and more precisely in the following book :
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 *
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 *                    MPC750
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 *                    Risc Microporcessor User's Manual
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 *                    Motorola REF : MPC750UM/AD 8/97
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 *
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 * Copyright (C) 1999  Eric Valette (valette@crf.canon.fr)
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 *                     Canon Centre Recherche France.
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 *
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 * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
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 * to support 603, 603e, 604, 604e exceptions
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 *
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 *  The license and distribution terms for this file may be
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 *  found in found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 * $Id: raw_exception.c,v 1.2 2001-09-27 12:01:25 chris Exp $
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 */
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#include <rtems/score/targopts.h>
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#include <rtems/score/ppc.h>
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#include <rtems/system.h>
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#include <rtems/score/cpu.h>
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#include <libcpu/raw_exception.h>
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#include <libcpu/cpu.h>
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30 
static rtems_raw_except_connect_data*           raw_except_table;
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static rtems_raw_except_connect_data            default_raw_except_entry;
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static rtems_raw_except_global_settings*        local_settings;
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int mpc750_vector_is_valid(rtems_vector vector)
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{
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  switch(vector) {
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  case ASM_RESET_VECTOR: /* fall through */
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  case ASM_MACH_VECTOR:
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  case ASM_PROT_VECTOR:
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  case ASM_ISI_VECTOR:
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  case ASM_EXT_VECTOR:
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  case ASM_ALIGN_VECTOR:
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  case ASM_PROG_VECTOR:
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  case ASM_FLOAT_VECTOR:
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  case ASM_DEC_VECTOR:
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  case ASM_SYS_VECTOR:
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  case ASM_TRACE_VECTOR:
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  case ASM_ADDR_VECTOR:
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  case ASM_SYSMGMT_VECTOR:
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  case ASM_ITM_VECTOR:
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    return 1;
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  default: return 0;
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  }
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}
55 
 
56 
int mpc603_vector_is_valid(rtems_vector vector)
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{
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  switch(vector) {
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  case ASM_RESET_VECTOR: /* fall through */
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  case ASM_MACH_VECTOR:
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  case ASM_PROT_VECTOR:
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  case ASM_ISI_VECTOR:
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  case ASM_EXT_VECTOR:
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  case ASM_ALIGN_VECTOR:
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  case ASM_PROG_VECTOR:
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  case ASM_FLOAT_VECTOR:
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  case ASM_DEC_VECTOR:
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  case ASM_SYS_VECTOR:
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  case ASM_TRACE_VECTOR:
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    return 1;
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  case ASM_PERFMON_VECTOR:
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    return 0;
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  case ASM_IMISS_VECTOR: /* fall through */
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  case ASM_DLMISS_VECTOR:
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  case ASM_DSMISS_VECTOR:
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  case ASM_ADDR_VECTOR:
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  case ASM_SYSMGMT_VECTOR:
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    return 1;
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  case ASM_ITM_VECTOR:
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    return 0;
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  }
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  return 0;
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}
84 
 
85 
int mpc604_vector_is_valid(rtems_vector vector)
86 
{
87 
  switch(vector) {
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  case ASM_RESET_VECTOR: /* fall through */
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  case ASM_MACH_VECTOR:
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  case ASM_PROT_VECTOR:
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  case ASM_ISI_VECTOR:
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  case ASM_EXT_VECTOR:
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  case ASM_ALIGN_VECTOR:
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  case ASM_PROG_VECTOR:
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  case ASM_FLOAT_VECTOR:
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  case ASM_DEC_VECTOR:
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  case ASM_SYS_VECTOR:
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  case ASM_TRACE_VECTOR:
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  case ASM_PERFMON_VECTOR:
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    return 1;
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  case ASM_IMISS_VECTOR: /* fall through */
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  case ASM_DLMISS_VECTOR:
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  case ASM_DSMISS_VECTOR:
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    return 0;
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  case ASM_ADDR_VECTOR: /* fall through */
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  case ASM_SYSMGMT_VECTOR:
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    return 1;
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  case ASM_ITM_VECTOR:
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    return 0;
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  }
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  return 0;
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}
113 
 
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int mpc60x_set_exception  (const rtems_raw_except_connect_data* except)
115 
{
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    unsigned int level;
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    switch (current_ppc_cpu) {
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        case PPC_750:
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            if (!mpc750_vector_is_valid(except->exceptIndex)) {
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                return 0;
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            }
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            break;
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        case PPC_604:
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        case PPC_604e:
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        case PPC_604r:
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            if (!mpc604_vector_is_valid(except->exceptIndex)) {
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                return 0;
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            }
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            break;
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        case PPC_603:
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        case PPC_603e:
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            if (!mpc603_vector_is_valid(except->exceptIndex)) {
134 
                return 0;
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            }
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            break;
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        default:
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            printk("Please complete libcpu/powerpc/mpc6xx/raw_exception.c\n");
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            printk("current_ppc_cpu = %x\n", current_ppc_cpu);
140 
            return 0;
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    }
142 
 
143 
    /*
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     * Check if default handler is actually connected. If not issue an error.
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     * You must first get the current handler via mpc60x_get_current_exception
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     * and then disconnect it using mpc60x_delete_exception.
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     * RATIONALE : to always have the same transition by forcing the user
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     * to get the previous handler before accepting to disconnect.
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     */
150 
    if (memcmp(mpc60x_get_vector_addr(except->exceptIndex), (void*)default_raw_except_entry.hdl.raw_hdl,default_raw_except_entry.hdl.raw_hdl_size)) {
151 
      return 0;
152 
    }
153 
 
154 
    _CPU_ISR_Disable(level);
155 
 
156 
    raw_except_table [except->exceptIndex] = *except;
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    codemove((void*)mpc60x_get_vector_addr(except->exceptIndex),
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             except->hdl.raw_hdl,
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             except->hdl.raw_hdl_size,
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             PPC_CACHE_ALIGNMENT);
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    except->on(except);
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    _CPU_ISR_Enable(level);
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    return 1;
165 
}
166 
 
167 
int mpc60x_get_current_exception (rtems_raw_except_connect_data* except)
168 
{
169 
  if (!mpc750_vector_is_valid(except->exceptIndex)){
170 
    return 0;
171 
  }
172 
 
173 
  *except = raw_except_table [except->exceptIndex];
174 
 
175 
  return 1;
176 
}
177 
 
178 
int mpc60x_delete_exception (const rtems_raw_except_connect_data* except)
179 
{
180 
  unsigned int level;
181 
 
182 
  if (!mpc750_vector_is_valid(except->exceptIndex)){
183 
    return 0;
184 
  }
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  /*
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   * Check if handler passed is actually connected. If not issue an error.
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   * You must first get the current handler via mpc60x_get_current_exception
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   * and then disconnect it using mpc60x_delete_exception.
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   * RATIONALE : to always have the same transition by forcing the user
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   * to get the previous handler before accepting to disconnect.
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   */
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  if (memcmp(mpc60x_get_vector_addr(except->exceptIndex),
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             (void*)except->hdl.raw_hdl,
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             except->hdl.raw_hdl_size)) {
195 
      return 0;
196 
  }
197 
  _CPU_ISR_Disable(level);
198 
 
199 
  except->off(except);
200 
  codemove((void*)mpc60x_get_vector_addr(except->exceptIndex),
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           default_raw_except_entry.hdl.raw_hdl,
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           default_raw_except_entry.hdl.raw_hdl_size,
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           PPC_CACHE_ALIGNMENT);
204 
 
205 
 
206 
  raw_except_table[except->exceptIndex] = default_raw_except_entry;
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  raw_except_table[except->exceptIndex].exceptIndex = except->exceptIndex;
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209 
  _CPU_ISR_Enable(level);
210 
 
211 
  return 1;
212 
}
213 
 
214 
/*
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 * Exception global init.
216 
 */
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int mpc60x_init_exceptions (rtems_raw_except_global_settings* config)
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{
219 
    unsigned                    i;
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    unsigned int level;
221 
 
222 
    /*
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     * store various accelerators
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     */
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    raw_except_table            = config->rawExceptHdlTbl;
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    local_settings              = config;
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    default_raw_except_entry    = config->defaultRawEntry;
228 
 
229 
    _CPU_ISR_Disable(level);
230 
 
231 
    for (i=0; i <= LAST_VALID_EXC; i++) {
232 
      if (!mpc750_vector_is_valid(i)){
233 
        continue;
234 
      }
235 
      codemove((void*)mpc60x_get_vector_addr(i),
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             raw_except_table[i].hdl.raw_hdl,
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             raw_except_table[i].hdl.raw_hdl_size,
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             PPC_CACHE_ALIGNMENT);
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      if (raw_except_table[i].hdl.raw_hdl != default_raw_except_entry.hdl.raw_hdl) {
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        raw_except_table[i].on(&raw_except_table[i]);
241 
      }
242 
      else {
243 
        raw_except_table[i].off(&raw_except_table[i]);
244 
      }
245 
    }
246 
    _CPU_ISR_Enable(level);
247 
 
248 
    return 1;
249 
}
250 
 
251 
int mpc60x_get_exception_config (rtems_raw_except_global_settings** config)
252 
{
253 
  *config = local_settings;
254 
  return 1;
255 
}
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