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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libcpu/] [powerpc/] [ppc403/] [ictrl/] [ictrl.h] - Blame information for rev 778

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/*  ictrl.h
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 *
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 *  This file contains definitions and declarations for the
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 *  PowerPC 403 CPU built-in external interrupt controller
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 *
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 *
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 *  Author: Thomas Doerfler <td@imd.m.isar.de>
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 *
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 *  COPYRIGHT (c) 1998 by IMD, Puchheim, Germany
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 *
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 *  To anyone who acknowledges that this file is provided "AS IS"
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 *  without any express or implied warranty:
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 *      permission to use, copy, modify, and distribute this file
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 *      for any purpose is hereby granted without fee, provided that
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 *      the above copyright notice and this notice appears in all
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 *      copies, and that the name of IMD not be used in
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 *      advertising or publicity pertaining to distribution of the
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 *      software without specific, written prior permission.
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 *      IMD makes no representations about the suitability
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 *      of this software for any purpose.
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 *
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 */
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#ifndef _INCLUDE_ICTRL_h
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#define _INCLUDE_ICTRL_h
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#include <rtems.h>
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#include <rtems/system.h>
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#include <rtems/score/isr.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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 *  definitions for second level IRQ handler support
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 *  External Interrupts via EXTERNAL/EISR
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 */
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#define PPC_IRQ_EXT_BASE        (PPC_IRQ_LAST+1)
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/* mask for external interrupt status in EXIER/EXISR register */
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/* note: critical interrupt is in these registers aswell */
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#define PPC_EXI_MASK           0x0FFFFFFF
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#define PPC_IRQ_EXT_SPIR        (PPC_IRQ_EXT_BASE+4)
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#define PPC_IRQ_EXT_SPIT        (PPC_IRQ_EXT_BASE+5)
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#define PPC_IRQ_EXT_JTAGR       (PPC_IRQ_EXT_BASE+6)
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#define PPC_IRQ_EXT_JTAGT       (PPC_IRQ_EXT_BASE+7)
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#define PPC_IRQ_EXT_DMA0        (PPC_IRQ_EXT_BASE+8)
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#define PPC_IRQ_EXT_DMA1        (PPC_IRQ_EXT_BASE+9)
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#define PPC_IRQ_EXT_DMA2        (PPC_IRQ_EXT_BASE+10)
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#define PPC_IRQ_EXT_DMA3        (PPC_IRQ_EXT_BASE+11)
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#define PPC_IRQ_EXT_0           (PPC_IRQ_EXT_BASE+27)
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#define PPC_IRQ_EXT_1           (PPC_IRQ_EXT_BASE+28)
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#define PPC_IRQ_EXT_2           (PPC_IRQ_EXT_BASE+29)
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#define PPC_IRQ_EXT_3           (PPC_IRQ_EXT_BASE+30)
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#define PPC_IRQ_EXT_4           (PPC_IRQ_EXT_BASE+31)
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#define PPC_IRQ_EXT_MAX         (32)
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#define VEC_TO_EXMSK(v)         (0x80000000 >> (v))
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/*
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 *
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 * install a user vector for one of the external interrupt sources
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 *
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 */
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rtems_status_code
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ictrl_set_vector(rtems_isr_entry   new_handler,
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                 unsigned32        vector,
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                 rtems_isr_entry   *old_handler
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);
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/*
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 * activate the interrupt controller
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 */
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rtems_status_code
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ictrl_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* ! _INCLUDE_ICTRL_h */
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/* end of include file */

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