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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [lib/] [libcpu/] [sh/] [sh7032/] [include/] [sh7_pfc.h] - Blame information for rev 173

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/*
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 * Bit values for the pin function controller of the Hitachi SH703X
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 *
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 * From Hitachi tutorials
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 *
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 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
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 *           Bernd Becker (becker@faw.uni-ulm.de)
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 *
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 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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 *
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 *
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 *  COPYRIGHT (c) 1998.
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 *  On-Line Applications Research Corporation (OAR).
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 *  Copyright assigned to U.S. Government, 1994.
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  $Id: sh7_pfc.h,v 1.2 2001-09-27 12:01:32 chris Exp $
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 */
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#ifndef _sh7_pfc_h
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#define _sh7_pfc_h
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#include <rtems/score/iosh7032.h>
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/*
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 * Port B IO Register (PBIOR)
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 */
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#define PBIOR           PFC_PBIOR
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#define PB15IOR         0x8000
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#define PB14IOR         0x4000
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#define PB13IOR         0x2000
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#define PB12IOR         0x1000
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#define PB11IOR         0x0800
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#define PB10IOR         0x0400
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#define PB9IOR          0x0200
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#define PB8IOR          0x0100
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#define PB7IOR          0x0080
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#define PB6IOR          0x0040
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#define PB5IOR          0x0020
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#define PB4IOR          0x0010
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#define PB3IOR          0x0008
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#define PB2IOR          0x0004
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#define PB1IOR          0x0002
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#define PB0IOR          0x0001
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/*
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 * Port B Control Register (PBCR1)
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 */
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#define PBCR1           PFC_PBCR1
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#define PB15MD1         0x8000
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#define PB15MD0         0x4000
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#define PB14MD1         0x2000
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#define PB14MD0         0x1000
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#define PB13MD1         0x0800
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#define PB13MD0         0x0400
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#define PB12MD1         0x0200
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#define PB12MD0         0x0100
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#define PB11MD1         0x0080
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#define PB11MD0         0x0040
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#define PB10MD1         0x0020
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#define PB10MD0         0x0010
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#define PB9MD1          0x0008
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#define PB9MD0          0x0004
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#define PB8MD1          0x0002
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#define PB8MD0          0x0001
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#define PB15MD          PB15MD1|PB14MD0
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#define PB14MD          PB14MD1|PB14MD0
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#define PB13MD          PB13MD1|PB13MD0
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#define PB12MD          PB12MD1|PB12MD0
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#define PB11MD          PB11MD1|PB11MD0
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#define PB10MD          PB10MD1|PB10MD0
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#define PB9MD           PB9MD1|PB9MD0
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#define PB8MD           PB8MD1|PB8MD0
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#define PB_TXD1         PB11MD1
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#define PB_RXD1         PB10MD1
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#define PB_TXD0         PB9MD1
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#define PB_RXD0         PB8MD1
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/*
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 * Port B Control Register (PBCR2)
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 */
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#define PBCR2   PFC_PBCR2
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#define PB7MD1  0x8000
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#define PB7MD0  0x4000
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#define PB6MD1  0x2000
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#define PB6MD0  0x1000
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#define PB5MD1  0x0800
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#define PB5MD0  0x0400
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#define PB4MD1  0x0200
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#define PB4MD0  0x0100
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#define PB3MD1  0x0080
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#define PB3MD0  0x0040
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#define PB2MD1  0x0020
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#define PB2MD0  0x0010
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#define PB1MD1  0x0008
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#define PB1MD0  0x0004
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#define PB0MD1  0x0002
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#define PB0MD0  0x0001
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#define PB7MD   PB7MD1|PB7MD0
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#define PB6MD   PB6MD1|PB6MD0
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#define PB5MD   PB5MD1|PB5MD0
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#define PB4MD   PB4MD1|PB4MD0
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#define PB3MD   PB3MD1|PB3MD0
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#define PB2MD   PB2MD1|PB2MD0
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#define PB1MD   PB1MD1|PB1MD0
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#define PB0MD   PB0MD1|PB0MD0
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#endif /* _sh7_pfc_h */

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