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[/] [openrisc/] [trunk/] [rtos/] [rtems/] [c/] [src/] [librdbg/] [src/] [powerpc/] [mcp750/] [remdeb_f.x] - Blame information for rev 307

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/*
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 **************************************************************************
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 *
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 * Component =   rdblib
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 * Synopsis  =   remdeb_f.x
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 *
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 **************************************************************************
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 * $Id: remdeb_f.x,v 1.2 2001-09-27 12:02:02 chris Exp $
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 **************************************************************************
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 */
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struct xdr_regs
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{
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  unsigned int  tabreg[40];
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};
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#ifdef RPC_HDR
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%/* now define register macros to apply to xdr_regs struct */
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%
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%#define R_PC           0
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%#define R_MSR          1
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%#define R_EXCEPNB      2
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%#define R_R0           3
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%#define R_R1    (R_R0 + 1)
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%#define R_R2    (R_R0 + 2)
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%#define R_R3    (R_R0 + 3)
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%#define R_R4    (R_R0 + 4)
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%#define R_R5    (R_R0 + 5)
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%#define R_R6    (R_R0 + 6)
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%#define R_R7    (R_R0 + 7)
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%#define R_R8    (R_R0 + 8)
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%#define R_R9    (R_R0 + 9)
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%#define R_R10   (R_R0 + 10)
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%#define R_R11   (R_R0 + 11)
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%#define R_R12   (R_R0 + 12)
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%#define R_R13   (R_R0 + 13)
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%#define R_R14   (R_R0 + 14)
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%#define R_R15   (R_R0 + 15)
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%#define R_R16   (R_R0 + 16)
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%#define R_R17   (R_R0 + 17)
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%#define R_R18   (R_R0 + 18)
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%#define R_R19   (R_R0 + 19)
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%#define R_R20   (R_R0 + 20)
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%#define R_R21   (R_R0 + 21)
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%#define R_R22   (R_R0 + 22)
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%#define R_R23   (R_R0 + 23)
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%#define R_R24   (R_R0 + 24)
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%#define R_R25   (R_R0 + 25)
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%#define R_R26   (R_R0 + 26)
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%#define R_R27   (R_R0 + 27)
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%#define R_R28   (R_R0 + 28)
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%#define R_R29   (R_R0 + 29)
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%#define R_R30   (R_R0 + 30)
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%#define R_R31   (R_R0 + 31)
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%#define R_CR    35
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%#define R_CTR   36
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%#define R_XER   37
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%#define R_LR    38
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%#define R_MQ    39
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%
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%#include 
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%
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%#define REG_PC tabreg[R_PC]     /* PC register offset */
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%#define REG_SP tabreg[R_R1]    /* SP register offset */
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%#define REG_FP tabreg[R_R1]    /* SP register offset (no FP on PPC) */
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%#define BREAK_SIZE     4       /* Breakpoint occupies 4 bytes */
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%#define BREAK_ADJ      0       /* Nothing to subtract from address after bp */
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%#define IS_BREAK(l)    ((l) == 0x7d8d6808)
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%#define SET_BREAK(l)   (0x7d8d6808)
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%#define ORG_BREAK(c,p) (p)
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%#define IS_STEP(regs)  (regs.tabreg[R_EXCEPNB] == ASM_TRACE_VECTOR) /* Was step and not break */
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%#define TARGET_PROC_TYPE  3
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#endif
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