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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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Author |
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541 |
julius |
2011-05-17 Stefan Kristiansson
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* ucos-port/os_cpu_c.c:
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(OSTaskStkInit): Use ICE and DCE from current SR instead of
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default to disable.
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525 |
julius |
2011-04-20 Julius Baxter
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* ucos-port/os_cpu_c.c:
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(OSTaskStkInit): Made stack initialisation skip red zone (128 bytes).
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526 |
julius |
* ucos-port/os_cpu_a.S:
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(UserISR): Fix register used on entry. (submitted by user keviny)
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| 11 |
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| 12 |
474 |
julius |
2011-01-14 Julius Baxter
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* config.mk: : Added entry point at 0x100 (decimal 256).
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| 15 |
471 |
julius |
2011-01-11 Julius Baxter
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* ucos-port/: Created.
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* tasks/: Likewise.
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* ucos/os_cpu_c.c: Moved to ucos-port/
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* os_cpu_a.S: Moved to ucos-port/
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* common/cprintf_r.c: Added.
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* ucos-port/Makefile: Likewise.
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* tasks/Makefile: Likewise.
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* include/cprintf_r.h: Likewise.
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| 24 |
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* drivers/console.c: Likewise.
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| 25 |
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* include/console.h: Likewise.
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| 26 |
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* tasks/tasks1.c: Likewise
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* common/main.c:
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| 28 |
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(TaskStart): Added - calls hook for tasks code TaskStartCreateTasks.
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| 29 |
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(main): Changed printf to console_puts calls with loc. info.
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| 30 |
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* include/spr_defs: Removed.
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| 31 |
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* include/spr-defs: Added from latest or1ksim version.
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| 34 |
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2011-01-07 Julius Baxter
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| 35 |
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* ChangeLog-OR32: Created
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| 36 |
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* sim.cfg: MC disabled, flash memory removed, MMUs disabled, debug
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| 37 |
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disabled, CUC removed.
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| 38 |
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* os_cpu_a.S: Updated
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* ram.ld: Added
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* flash.ld: removed
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* Makefile: Final link stage replaced with $(CC) instead of $(LD), it
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finds libraries with greater ease.
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| 43 |
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* include/board.h: Removed all MC defines, flash boot options.
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| 44 |
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* include/os_cfg.h: Updated to version 2.91 (is default)
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