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/*
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----------------------------------------------------------------------
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CHiPES Embedded RTR Systems Copyright (c) Tim Oliver 2002-2004
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----------------------------------------------------------------------
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File : os_cpu.h
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Author : Tim Oliver
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Email : timtimoliver@yahoo.co.uk
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---------------------------[Description]------------------------------
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Part of the OpenRISC Reference Platform Port of MicroC/OS-II
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-------------------------[CVS Information]----------------------------
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$Id: os_cpu.h,v 1.1 2004/07/22 06:36:58 p014082819 Exp $
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$Revision: 1.1 $
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----------------------------------------------------------------------
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*/
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/*
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef OS_CPU_H
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#define OS_CPU_H
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#ifdef OS_CPU_GLOBALS
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#define OS_CPU_EXT
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#else
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#define OS_CPU_EXT extern
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#endif
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/* Register access macros */
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#define REG8(add) *((volatile unsigned char *)(add))
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#define REG16(add) *((volatile unsigned short *)(add))
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#define REG32(add) *((volatile unsigned long *)(add))
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/*$PAGE*/
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/*
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*********************************************************************************************************
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* DATA TYPES
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* (Compiler Specific)
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*********************************************************************************************************
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*/
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typedef unsigned char BOOLEAN;
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typedef unsigned char INT8U; /* Unsigned 8 bit quantity */
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typedef signed char INT8S; /* Signed 8 bit quantity */
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typedef unsigned int INT16U; /* Unsigned 16 bit quantity */
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typedef signed int INT16S; /* Signed 16 bit quantity */
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typedef unsigned long INT32U; /* Unsigned 32 bit quantity */
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typedef signed long INT32S; /* Signed 32 bit quantity */
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typedef unsigned long OS_STK; /* Each stack entry is 32-bits wide */
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typedef unsigned long volatile OS_CPU_SR; /* The CPU Status Word is 32-bits wide */
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/* This variable MUST be volatile for proper */
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/* operation. Refer to os_cpu_a.s for more */
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/* details. */
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/*
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*********************************************************************************************************
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* OpenCores OpenRISC
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*
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* Method #1: Disable/Enable interrupts using simple instructions. After critical section, interrupts
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* will be enabled even if they were disabled before entering the critical section.
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*
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* Method #2: Disable/Enable interrupts by preserving the state of interrupts. In other words, if
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* interrupts were disabled before entering the critical section, they will be disabled when
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* leaving the critical section.
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*
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* Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
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* would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
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* disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
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* disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
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* into the CPU's status register.
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*********************************************************************************************************
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*/
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#define OS_CRITICAL_METHOD 3
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#if OS_CRITICAL_METHOD == 3
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#define OS_ENTER_CRITICAL() cpu_sr = OSDisableInterrupts();
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#define OS_EXIT_CRITICAL() OSEnableInterrupts(cpu_sr);
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#endif
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/*
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*********************************************************************************************************
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* OpenCores OpenRISC
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*********************************************************************************************************
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*/
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#define OS_STK_GROWTH 1 /* Stack grows from HIGH to LOW memory on OpenRISC */
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#define OS_TASK_SW() __asm__ ("l.sys 0");\
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__asm__ ("l.nop");
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/*
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*********************************************************************************************************
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* GLOBAL VARIABLES
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* FUNCTION PROTOTYPES
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*********************************************************************************************************
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*/
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR OSDisableInterrupts(void);
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void OSEnableInterrupts(OS_CPU_SR cpu_sr);
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#endif
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/*
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#ifdef DEBUG
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#define debug(fmt,args...) printf (fmt ,##args)
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#else
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#define debug(fmt,args...) __printf (fmt ,##args)
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#endif
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*/
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extern void mtspr(unsigned long spr, unsigned long value); /* For writing into SPR. */
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extern unsigned long mfspr(unsigned long spr); /* For reading SPR. */
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extern void report(unsigned long value); /* Prints out a value */
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extern void exit (int i) __attribute__ ((__noreturn__)); /* return value by making a syscall */
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//extern void __printf (const char *fmt, ...); /* simulator stdout */
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extern void OSInitTick (void); /* init ticker */
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void main (void); /* Function to be called at entry point - not defined here. */
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/* stdio */
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extern int getc (void);
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extern int testc (void);
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extern int ctrlc (void);
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extern void putc (const char c);
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#endif
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