OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [ucos-ii/] [2.91/] [ram.ld] - Blame information for rev 495

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 471 julius
MEMORY
2
        {
3
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
4
        ram     : ORIGIN = 0x00002000, LENGTH = 0x00200000 - 0x00002000
5
        }
6
 
7
SECTIONS
8
{
9
        .vectors :
10
        {
11
                *(.vectors)
12
        } > vectors
13
 
14
        .text : {
15
                _stext = .;
16
                *(.text)
17
                _etext  =  .;
18
                __CTOR_LIST__ = .;
19
                LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
20
                *(.ctors)
21
                LONG(0)
22
                __CTOR_END__ = .;
23
                __DTOR_LIST__ = .;
24
                LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
25
                *(.dtors)
26
                LONG(0)
27
                __DTOR_END__ = .;
28
                *(.lit)
29
                *(.shdata)
30
                _endtext = .;
31
        }  > ram
32
 
33
        .rodata : {
34
                *(.rodata);
35
                *(.rodata.*)
36
        } > ram
37
 
38
        .shbss :
39
        {
40
                *(.shbss)
41
        } > ram
42
 
43
        .talias :
44
        {
45
        }  > ram
46
 
47
        .data : {
48
                sdata  =  .;
49
                _sdata  =  .;
50
                *(.data)
51
                edata  =  .;
52
                _edata  =  .;
53
        } > ram
54
 
55
        .bss SIZEOF(.data) + ADDR(.data) :
56
        {
57
                sbss = . ;
58
                _sbss = . ;
59
                __bss_start = ALIGN(0x8);
60
                ___bss_start = ALIGN(0x8);
61
                *(.bss)
62
                *(COMMON)
63
                end = ALIGN(0x8);
64
                _end = ALIGN(0x8);
65
                __end = ALIGN(0x8);
66
                ebss = .;
67
                _ebss = .;
68
        } > ram
69
 
70
        .stack :
71
        {
72
        *(.stack)
73
        _stack_addr = .;
74
        } > ram
75
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.