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tobil |
-source ..\..\rtl\rtl_orig\verilog\or1200_top.v
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| 2 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_alu.v
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-source ..\..\rtl\rtl_orig\verilog\or1200_cpu.v
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-source ..\..\rtl\rtl_orig\verilog\or1200_cfgr.v
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-source ..\..\rtl\rtl_orig\verilog\or1200_ctrl.v
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-source ..\..\rtl\rtl_orig\verilog\or1200_dc_fsm.v
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-source ..\..\rtl\rtl_orig\verilog\or1200_dc_ram.v
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-source ..\..\rtl\rtl_orig\verilog\or1200_dc_tag.v
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| 9 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_dc_top.v
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| 10 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_dmmu_tlb.v
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| 11 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_dmmu_top.v
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| 12 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_du.v
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| 13 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_except.v
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| 14 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_freeze.v
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| 15 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_genpc.v
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| 16 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_gmultp2_32x32.v
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| 17 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_ic_fsm.v
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| 18 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_ic_ram.v
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| 19 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_ic_tag.v
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| 20 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_ic_top.v
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| 21 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_if.v
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| 22 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_immu_tlb.v
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| 23 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_immu_top.v
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| 24 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_iwb_biu.v
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| 25 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_lsu.v
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| 26 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_sprs.v
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| 27 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_mem2reg.v
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| 28 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_mult_mac.v
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| 29 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_operandmuxes.v
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| 30 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_pic.v
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| 31 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_pm.v
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| 32 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_qmem_top.v
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| 33 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_reg2mem.v
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| 34 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_rf.v
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| 35 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_sb.v
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| 36 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_tt.v
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| 37 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_wb_biu.v
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| 38 |
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-source ..\..\rtl\rtl_orig\verilog\or1200_wbmux.v
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| 39 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dc_ram_blk.v
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| 40 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dc_ram_sub.v
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| 41 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dc_tag_blk.v
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| 42 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dc_tag_sub.v
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| 43 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dtlb_mr_blk.v
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| 44 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dtlb_mr_sub.v
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| 45 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dtlb_tr_blk.v
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| 46 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\dtlb_tr_sub.v
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| 47 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\ic_ram_blk.v
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| 48 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\ic_ram_sub.v
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| 49 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\ic_tag_blk.v
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| 50 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\ic_tag_sub.v
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| 51 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\itlb_mr_blk.v
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| 52 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\itlb_mr_sub.v
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| 53 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\itlb_tr_blk.v
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| 54 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\itlb_tr_sub.v
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| 55 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\rf_dist_model.v
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| 56 |
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-source ..\..\rtl\rtl_virtex_orig\verilog\rf_sub.v
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| 57 |
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-top or1200_top
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| 58 |
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-dut or1200_top
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