URL https://opencores.org/ocsvn/or1200_soc/or1200_soc/trunk

Subversion Repositories or1200_soc

[/] [or1200_soc/] [trunk/] [boards/] [de1_board/] [sw/] [tests/] [debug/] [de1_or1200.h] - Blame information for rev 21

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//
//
//
 
 
#ifndef __DE1_OR1200_H
#define __DE1_OR1200_H
 
/* Register access macros */
#define REG8(add) *((volatile unsigned char *)(add))
#define REG16(add) *((volatile unsigned short *)(add))
#define REG32(add) *((volatile unsigned long *)(add))
 
#define LSR_BASE  ( REG8(0x50000005) )
#define THR_BASE  ( REG8(0x50000000) )
 
 
#endif

Line No.	Rev	Author	Line
1	21	qaztronic	`//`
2			`//`
3			`//`
4
5
6			`#ifndef __DE1_OR1200_H`
7			`#define __DE1_OR1200_H`
8
9			`/* Register access macros */`
10			`#define REG8(add) ((volatile unsigned char )(add))`
11			`#define REG16(add) ((volatile unsigned short )(add))`
12			`#define REG32(add) ((volatile unsigned long )(add))`
13
14			`#define LSR_BASE ( REG8(0x50000005) )`
15			`#define THR_BASE ( REG8(0x50000000) )`
16
17
18			`#endif`

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Subversion Repositories or1200_soc

[/] [or1200_soc/] [trunk/] [boards/] [de1_board/] [sw/] [tests/] [debug/] [de1_or1200.h] - Blame information for rev 21