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[/] [or1200_soc/] [trunk/] [boards/] [de1_board/] [syn/] [adbg/] [de1_top.flow.rpt] - Blame information for rev 27

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Line No. Rev Author Line
1 25 qaztronic
Flow report for de1_top
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Wed Feb 17 15:51:57 2010
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Quartus II Version 9.1 Build 304 01/25/2010 Service Pack 1 SJ Web Edition
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---------------------
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; Table of Contents ;
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---------------------
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  1. Legal Notice
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  2. Flow Summary
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  3. Flow Settings
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  4. Flow Non-Default Global Settings
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  5. Flow Elapsed Time
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  6. Flow OS Summary
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  7. Flow Log
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2010 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors.  Please refer to the
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applicable agreement for further details.
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+-----------------------------------------------------------------------------------+
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; Flow Summary                                                                      ;
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+------------------------------------+----------------------------------------------+
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; Flow Status                        ; Successful - Wed Feb 17 15:51:57 2010        ;
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; Quartus II Version                 ; 9.1 Build 304 01/25/2010 SP 1 SJ Web Edition ;
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; Revision Name                      ; de1_top                                      ;
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; Top-level Entity Name              ; top                                          ;
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; Family                             ; Cyclone II                                   ;
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; Device                             ; EP2C20F484C7                                 ;
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; Timing Models                      ; Final                                        ;
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; Met timing requirements            ; Yes                                          ;
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; Total logic elements               ; 12,469 / 18,752 ( 66 % )                     ;
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;     Total combinational functions  ; 10,134 / 18,752 ( 54 % )                     ;
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;     Dedicated logic registers      ; 6,018 / 18,752 ( 32 % )                      ;
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; Total registers                    ; 6018                                         ;
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; Total pins                         ; 283 / 315 ( 90 % )                           ;
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; Total virtual pins                 ; 0                                            ;
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; Total memory bits                  ; 8,448 / 239,616 ( 4 % )                      ;
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; Embedded Multiplier 9-bit elements ; 8 / 52 ( 15 % )                              ;
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; Total PLLs                         ; 0 / 4 ( 0 % )                                ;
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+------------------------------------+----------------------------------------------+
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+-----------------------------------------+
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; Flow Settings                           ;
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+-------------------+---------------------+
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; Option            ; Setting             ;
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+-------------------+---------------------+
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; Start date & time ; 02/17/2010 15:35:01 ;
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; Main task         ; Compilation         ;
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; Revision Name     ; de1_top             ;
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+-------------------+---------------------+
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+-----------------------------------------------------------------------------------------------------------------------------------------+
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; Flow Non-Default Global Settings                                                                                                        ;
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+-------------------------------------+--------------------------------------------------------+---------------+-------------+------------+
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; Assignment Name                     ; Value                                                  ; Default Value ; Entity Name ; Section Id ;
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+-------------------------------------+--------------------------------------------------------+---------------+-------------+------------+
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; COMPILER_SIGNATURE_ID               ; 896438637816.126644970103216                           ; --            ; --          ; --         ;
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; ENABLE_SIGNALTAP                    ; Off                                                    ; --            ; --          ; --         ;
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; NUM_PARALLEL_PROCESSORS             ; 2                                                      ; --            ; --          ; --         ;
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; PARTITION_COLOR                     ; 2147039                                                ; --            ; top         ; Top        ;
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; PARTITION_FITTER_PRESERVATION_LEVEL ; PLACEMENT                                              ; --            ; top         ; Top        ;
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; PARTITION_NETLIST_TYPE              ; SOURCE                                                 ; --            ; top         ; Top        ;
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; POWER_BOARD_THERMAL_MODEL           ; None (CONSERVATIVE)                                    ; --            ; --          ; --         ;
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; POWER_PRESET_COOLING_SOLUTION       ; 23 MM HEAT SINK WITH 200 LFPM AIRFLOW                  ; --            ; --          ; --         ;
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; SAVE_DISK_SPACE                     ; Off                                                    ; On            ; --          ; --         ;
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; SEARCH_PATH                         ; c:\qaz\_cvs_work\units\or1200_soc\sw\load_this_to_ram  ; --            ; --          ; --         ;
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; SEARCH_PATH                         ; c:\qaz\_cvs_work\units\or1200_soc\src                  ; --            ; --          ; --         ;
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; SEARCH_PATH                         ; c:\qaz\_cvs_work\units\or1200_soc\boards\de1_board\src ; --            ; --          ; --         ;
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; SMART_RECOMPILE                     ; On                                                     ; Off           ; --          ; --         ;
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; TOP_LEVEL_ENTITY                    ; top                                                    ; de1_top       ; --          ; --         ;
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; USE_SIGNALTAP_FILE                  ; stp1.stp                                               ; --            ; --          ; --         ;
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+-------------------------------------+--------------------------------------------------------+---------------+-------------+------------+
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+-----------------------------------------------------------------------------------------------------------------------------+
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; Flow Elapsed Time                                                                                                           ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Analysis & Synthesis    ; 00:02:17     ; 1.0                     ; 328 MB              ; 00:02:16                           ;
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; Fitter                  ; 00:14:18     ; 1.0                     ; 291 MB              ; 00:14:18                           ;
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; Assembler               ; 00:00:03     ; 1.0                     ; 244 MB              ; 00:00:03                           ;
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; Classic Timing Analyzer ; 00:00:06     ; 1.0                     ; 261 MB              ; 00:00:06                           ;
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; Total                   ; 00:16:44     ; --                      ; --                  ; 00:16:43                           ;
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+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
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+---------------------------------------------------------------------------------------+
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; Flow OS Summary                                                                       ;
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+-------------------------+------------------+------------+------------+----------------+
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; Module Name             ; Machine Hostname ; OS Name    ; OS Version ; Processor type ;
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+-------------------------+------------------+------------+------------+----------------+
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; Analysis & Synthesis    ; CSTO9972979      ; Windows XP ; 5.2        ; x86_64         ;
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; Fitter                  ; CSTO9972979      ; Windows XP ; 5.2        ; x86_64         ;
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; Assembler               ; CSTO9972979      ; Windows XP ; 5.2        ; x86_64         ;
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; Classic Timing Analyzer ; CSTO9972979      ; Windows XP ; 5.2        ; x86_64         ;
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+-------------------------+------------------+------------+------------+----------------+
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------------
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; Flow Log ;
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------------
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quartus_map --read_settings_files=on --write_settings_files=off DE1_TOP -c de1_top
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quartus_fit --read_settings_files=off --write_settings_files=off DE1_TOP -c de1_top
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quartus_asm --read_settings_files=off --write_settings_files=off DE1_TOP -c de1_top
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quartus_tan --read_settings_files=off --write_settings_files=off DE1_TOP -c de1_top --timing_analysis_only
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