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[/] [or1k/] [branches/] [mp3_stable/] [mp3/] [rtl/] [verilog/] [xfpga_defines.v] - Blame information for rev 1781

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1 266 lampret
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  MP3 demo Definitions                                        ////
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////                                                              ////
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////  This file is part of the MP3 demo application               ////
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////  http://www.opencores.org/cores/or1k/mp3/                    ////
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////                                                              ////
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////  Description                                                 ////
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////  DEfine target technology etc. Right now FIFOs are available ////
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////  only for Xilinx Virtex FPGAs. (TARGET_VIRTEX)               ////
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////                                                              ////
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////  To Do:                                                      ////
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////   - nothing really                                           ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - Damjan Lampret, damjan.lampret@opencores.org          ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2001 Authors                                   ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: not supported by cvs2svn $
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//
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// Define to target to Xilinx Virtex
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//
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`define TARGET_VIRTEX

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