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[/] [or1k/] [branches/] [oc/] [gdb-5.0/] [sim/] [common/] [sim-core.c] - Blame information for rev 1771

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1 106 markom
/*  This file is part of the program psim.
2
 
3
    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
4
 
5
    This program is free software; you can redistribute it and/or modify
6
    it under the terms of the GNU General Public License as published by
7
    the Free Software Foundation; either version 2 of the License, or
8
    (at your option) any later version.
9
 
10
    This program is distributed in the hope that it will be useful,
11
    but WITHOUT ANY WARRANTY; without even the implied warranty of
12
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
    GNU General Public License for more details.
14
 
15
    You should have received a copy of the GNU General Public License
16
    along with this program; if not, write to the Free Software
17
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
 
19
    */
20
 
21
 
22
#ifndef SIM_CORE_C
23
#define SIM_CORE_C
24
 
25
#include "sim-main.h"
26
#include "sim-assert.h"
27
 
28
#if (WITH_HW)
29
#include "sim-hw.h"
30
#endif
31
 
32
/* "core" module install handler.
33
 
34
   This is called via sim_module_install to install the "core"
35
   subsystem into the simulator.  */
36
 
37
#if EXTERN_SIM_CORE_P
38
static MODULE_INIT_FN sim_core_init;
39
static MODULE_UNINSTALL_FN sim_core_uninstall;
40
#endif
41
 
42
#if EXTERN_SIM_CORE_P
43
SIM_RC
44
sim_core_install (SIM_DESC sd)
45
{
46
  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
47
 
48
  /* establish the other handlers */
49
  sim_module_add_uninstall_fn (sd, sim_core_uninstall);
50
  sim_module_add_init_fn (sd, sim_core_init);
51
 
52
  /* establish any initial data structures - none */
53
  return SIM_RC_OK;
54
}
55
#endif
56
 
57
 
58
/* Uninstall the "core" subsystem from the simulator.  */
59
 
60
#if EXTERN_SIM_CORE_P
61
static void
62
sim_core_uninstall (SIM_DESC sd)
63
{
64
  sim_core *core = STATE_CORE(sd);
65
  unsigned map;
66
  /* blow away any mappings */
67
  for (map = 0; map < nr_maps; map++) {
68
    sim_core_mapping *curr = core->common.map[map].first;
69
    while (curr != NULL) {
70
      sim_core_mapping *tbd = curr;
71
      curr = curr->next;
72
      if (tbd->free_buffer != NULL) {
73
        SIM_ASSERT(tbd->buffer != NULL);
74
        zfree(tbd->free_buffer);
75
      }
76
      zfree(tbd);
77
    }
78
    core->common.map[map].first = NULL;
79
  }
80
}
81
#endif
82
 
83
 
84
#if EXTERN_SIM_CORE_P
85
static SIM_RC
86
sim_core_init (SIM_DESC sd)
87
{
88
  /* Nothing to do */
89
  return SIM_RC_OK;
90
}
91
#endif
92
 
93
 
94
 
95
#ifndef SIM_CORE_SIGNAL
96
#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
97
sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
98
#endif
99
 
100
#if EXTERN_SIM_CORE_P
101
void
102
sim_core_signal (SIM_DESC sd,
103
                 sim_cpu *cpu,
104
                 sim_cia cia,
105
                 unsigned map,
106
                 int nr_bytes,
107
                 address_word addr,
108
                 transfer_type transfer,
109
                 sim_core_signals sig)
110
{
111
  const char *copy = (transfer == read_transfer ? "read" : "write");
112
  address_word ip = CIA_ADDR (cia);
113
  switch (sig)
114
    {
115
    case sim_core_unmapped_signal:
116
      sim_io_eprintf (sd, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
117
                      nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
118
      sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGSEGV);
119
      break;
120
    case sim_core_unaligned_signal:
121
      sim_io_eprintf (sd, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
122
                      nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
123
      sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGBUS);
124
      break;
125
    default:
126
      sim_engine_abort (sd, cpu, cia,
127
                        "sim_core_signal - internal error - bad switch");
128
    }
129
}
130
#endif
131
 
132
 
133
#if EXTERN_SIM_CORE_P
134
static sim_core_mapping *
135
new_sim_core_mapping (SIM_DESC sd,
136
                      int level,
137
                      int space,
138
                      address_word addr,
139
                      address_word nr_bytes,
140
                      unsigned modulo,
141
#if WITH_HW
142
                      struct hw *device,
143
#else
144
                      device *device,
145
#endif
146
                      void *buffer,
147
                      void *free_buffer)
148
{
149
  sim_core_mapping *new_mapping = ZALLOC(sim_core_mapping);
150
  /* common */
151
  new_mapping->level = level;
152
  new_mapping->space = space;
153
  new_mapping->base = addr;
154
  new_mapping->nr_bytes = nr_bytes;
155
  new_mapping->bound = addr + (nr_bytes - 1);
156
  if (modulo == 0)
157
    new_mapping->mask = (unsigned) 0 - 1;
158
  else
159
    new_mapping->mask = modulo - 1;
160
  new_mapping->buffer = buffer;
161
  new_mapping->free_buffer = free_buffer;
162
  new_mapping->device = device;
163
  return new_mapping;
164
}
165
#endif
166
 
167
 
168
#if EXTERN_SIM_CORE_P
169
static void
170
sim_core_map_attach (SIM_DESC sd,
171
                     sim_core_map *access_map,
172
                     int level,
173
                     int space,
174
                     address_word addr,
175
                     address_word nr_bytes,
176
                     unsigned modulo,
177
#if WITH_HW
178
                     struct hw *client, /*callback/default*/
179
#else
180
                     device *client, /*callback/default*/
181
#endif
182
                     void *buffer, /*raw_memory*/
183
                     void *free_buffer) /*raw_memory*/
184
{
185
  /* find the insertion point for this additional mapping and then
186
     insert */
187
  sim_core_mapping *next_mapping;
188
  sim_core_mapping **last_mapping;
189
 
190
  SIM_ASSERT ((client == NULL) != (buffer == NULL));
191
  SIM_ASSERT ((client == NULL) >= (free_buffer != NULL));
192
 
193
  /* actually do occasionally get a zero size map */
194
  if (nr_bytes == 0)
195
    {
196
#if (WITH_DEVICES)
197
      device_error(client, "called on sim_core_map_attach with size zero");
198
#endif
199
#if (WITH_HW)
200
      sim_hw_abort (sd, client, "called on sim_core_map_attach with size zero");
201
#endif
202
      sim_io_error (sd, "called on sim_core_map_attach with size zero");
203
    }
204
 
205
  /* find the insertion point (between last/next) */
206
  next_mapping = access_map->first;
207
  last_mapping = &access_map->first;
208
  while(next_mapping != NULL
209
        && (next_mapping->level < level
210
            || (next_mapping->level == level
211
                && next_mapping->bound < addr)))
212
    {
213
      /* provided levels are the same */
214
      /* assert: next_mapping->base > all bases before next_mapping */
215
      /* assert: next_mapping->bound >= all bounds before next_mapping */
216
      last_mapping = &next_mapping->next;
217
      next_mapping = next_mapping->next;
218
    }
219
 
220
  /* check insertion point correct */
221
  SIM_ASSERT (next_mapping == NULL || next_mapping->level >= level);
222
  if (next_mapping != NULL && next_mapping->level == level
223
      && next_mapping->base < (addr + (nr_bytes - 1)))
224
    {
225
#if (WITH_DEVICES)
226
      device_error (client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
227
                    space,
228
                    (long) addr,
229
                    (long) nr_bytes,
230
                    (long) (addr + (nr_bytes - 1)),
231
                    next_mapping->space,
232
                    (long) next_mapping->base,
233
                    (long) next_mapping->bound,
234
                    (long) next_mapping->nr_bytes);
235
#endif
236
#if WITH_HW
237
      sim_hw_abort (sd, client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
238
                    space,
239
                    (long) addr,
240
                    (long) nr_bytes,
241
                    (long) (addr + (nr_bytes - 1)),
242
                    next_mapping->space,
243
                    (long) next_mapping->base,
244
                    (long) next_mapping->bound,
245
                    (long) next_mapping->nr_bytes);
246
#endif
247
      sim_io_error (sd, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
248
                    space,
249
                    (long) addr,
250
                    (long) nr_bytes,
251
                    (long) (addr + (nr_bytes - 1)),
252
                    next_mapping->space,
253
                    (long) next_mapping->base,
254
                    (long) next_mapping->bound,
255
                    (long) next_mapping->nr_bytes);
256
  }
257
 
258
  /* create/insert the new mapping */
259
  *last_mapping = new_sim_core_mapping(sd,
260
                                       level,
261
                                       space, addr, nr_bytes, modulo,
262
                                       client, buffer, free_buffer);
263
  (*last_mapping)->next = next_mapping;
264
}
265
#endif
266
 
267
 
268
/* Attach memory or a memory mapped device to the simulator.
269
   See sim-core.h for a full description.  */
270
 
271
#if EXTERN_SIM_CORE_P
272
void
273
sim_core_attach (SIM_DESC sd,
274
                 sim_cpu *cpu,
275
                 int level,
276
                 unsigned mapmask,
277
                 int space,
278
                 address_word addr,
279
                 address_word nr_bytes,
280
                 unsigned modulo,
281
#if WITH_HW
282
                 struct hw *client,
283
#else
284
                 device *client,
285
#endif
286
                 void *optional_buffer)
287
{
288
  sim_core *memory = STATE_CORE(sd);
289
  unsigned map;
290
  void *buffer;
291
  void *free_buffer;
292
 
293
  /* check for for attempt to use unimplemented per-processor core map */
294
  if (cpu != NULL)
295
    sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");
296
 
297
  /* verify modulo memory */
298
  if (!WITH_MODULO_MEMORY && modulo != 0)
299
    {
300
#if (WITH_DEVICES)
301
      device_error (client, "sim_core_attach - internal error - modulo memory disabled");
302
#endif
303
#if (WITH_HW)
304
      sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo memory disabled");
305
#endif
306
      sim_io_error (sd, "sim_core_attach - internal error - modulo memory disabled");
307
    }
308
  if (client != NULL && modulo != 0)
309
    {
310
#if (WITH_DEVICES)
311
      device_error (client, "sim_core_attach - internal error - modulo and callback memory conflict");
312
#endif
313
#if (WITH_HW)
314
      sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo and callback memory conflict");
315
#endif
316
      sim_io_error (sd, "sim_core_attach - internal error - modulo and callback memory conflict");
317
    }
318
  if (modulo != 0)
319
    {
320
      unsigned mask = modulo - 1;
321
      /* any zero bits */
322
      while (mask >= sizeof (unsigned64)) /* minimum modulo */
323
        {
324
          if ((mask & 1) == 0)
325
            mask = 0;
326
          else
327
            mask >>= 1;
328
        }
329
      if (mask != sizeof (unsigned64) - 1)
330
        {
331
#if (WITH_DEVICES)
332
          device_error (client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
333
#endif
334
#if (WITH_HW)
335
          sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
336
#endif
337
          sim_io_error (sd, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
338
        }
339
    }
340
 
341
  /* verify consistency between device and buffer */
342
  if (client != NULL && optional_buffer != NULL)
343
    {
344
#if (WITH_DEVICES)
345
      device_error (client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
346
#endif
347
#if (WITH_HW)
348
      sim_hw_abort (sd, client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
349
#endif
350
      sim_io_error (sd, "sim_core_attach - internal error - conflicting buffer and attach arguments");
351
    }
352
  if (client == NULL)
353
    {
354
      if (optional_buffer == NULL)
355
        {
356
          int padding = (addr % sizeof (unsigned64));
357
          unsigned long bytes = (modulo == 0 ? nr_bytes : modulo) + padding;
358
          free_buffer = zalloc (bytes);
359
          buffer = (char*) free_buffer + padding;
360
        }
361
      else
362
        {
363
          buffer = optional_buffer;
364
          free_buffer = NULL;
365
        }
366
    }
367
  else
368
    {
369
      /* a device */
370
      buffer = NULL;
371
      free_buffer = NULL;
372
    }
373
 
374
  /* attach the region to all applicable access maps */
375
  for (map = 0;
376
       map < nr_maps;
377
       map++)
378
    {
379
      if (mapmask & (1 << map))
380
        {
381
          sim_core_map_attach (sd, &memory->common.map[map],
382
                               level, space, addr, nr_bytes, modulo,
383
                               client, buffer, free_buffer);
384
          free_buffer = NULL;
385
        }
386
    }
387
 
388
  /* Just copy this map to each of the processor specific data structures.
389
     FIXME - later this will be replaced by true processor specific
390
     maps. */
391
  {
392
    int i;
393
    for (i = 0; i < MAX_NR_PROCESSORS; i++)
394
      {
395
        CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
396
      }
397
  }
398
}
399
#endif
400
 
401
 
402
/* Remove any memory reference related to this address */
403
#if EXTERN_SIM_CORE_P
404
static void
405
sim_core_map_detach (SIM_DESC sd,
406
                     sim_core_map *access_map,
407
                     int level,
408
                     int space,
409
                     address_word addr)
410
{
411
  sim_core_mapping **entry;
412
  for (entry = &access_map->first;
413
       (*entry) != NULL;
414
       entry = &(*entry)->next)
415
    {
416
      if ((*entry)->base == addr
417
          && (*entry)->level == level
418
          && (*entry)->space == space)
419
        {
420
          sim_core_mapping *dead = (*entry);
421
          (*entry) = dead->next;
422
          if (dead->free_buffer != NULL)
423
            zfree (dead->free_buffer);
424
          zfree (dead);
425
          return;
426
        }
427
    }
428
}
429
#endif
430
 
431
#if EXTERN_SIM_CORE_P
432
void
433
sim_core_detach (SIM_DESC sd,
434
                 sim_cpu *cpu,
435
                 int level,
436
                 int address_space,
437
                 address_word addr)
438
{
439
  sim_core *memory = STATE_CORE (sd);
440
  unsigned map;
441
  for (map = 0; map < nr_maps; map++)
442
    {
443
      sim_core_map_detach (sd, &memory->common.map[map],
444
                           level, address_space, addr);
445
    }
446
  /* Just copy this update to each of the processor specific data
447
     structures.  FIXME - later this will be replaced by true
448
     processor specific maps. */
449
  {
450
    int i;
451
    for (i = 0; i < MAX_NR_PROCESSORS; i++)
452
      {
453
        CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
454
      }
455
  }
456
}
457
#endif
458
 
459
 
460
STATIC_INLINE_SIM_CORE\
461
(sim_core_mapping *)
462
sim_core_find_mapping(sim_core_common *core,
463
                      unsigned map,
464
                      address_word addr,
465
                      unsigned nr_bytes,
466
                      transfer_type transfer,
467
                      int abort, /*either 0 or 1 - hint to inline/-O */
468
                      sim_cpu *cpu, /* abort => cpu != NULL */
469
                      sim_cia cia)
470
{
471
  sim_core_mapping *mapping = core->map[map].first;
472
  ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
473
  ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
474
  ASSERT (!abort || cpu != NULL); /* abort needs a non null CPU */
475
  while (mapping != NULL)
476
    {
477
      if (addr >= mapping->base
478
          && (addr + (nr_bytes - 1)) <= mapping->bound)
479
        return mapping;
480
      mapping = mapping->next;
481
    }
482
  if (abort)
483
    {
484
      SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, nr_bytes, addr, transfer,
485
                       sim_core_unmapped_signal);
486
    }
487
  return NULL;
488
}
489
 
490
 
491
STATIC_INLINE_SIM_CORE\
492
(void *)
493
sim_core_translate (sim_core_mapping *mapping,
494
                    address_word addr)
495
{
496
  if (WITH_MODULO_MEMORY)
497
    return (void *)((unsigned8 *) mapping->buffer
498
                    + ((addr - mapping->base) & mapping->mask));
499
  else
500
    return (void *)((unsigned8 *) mapping->buffer
501
                    + addr - mapping->base);
502
}
503
 
504
 
505
#if EXTERN_SIM_CORE_P
506
unsigned
507
sim_core_read_buffer (SIM_DESC sd,
508
                      sim_cpu *cpu,
509
                      unsigned map,
510
                      void *buffer,
511
                      address_word addr,
512
                      unsigned len)
513
{
514
  sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
515
  unsigned count = 0;
516
  while (count < len)
517
 {
518
    unsigned_word raddr = addr + count;
519
    sim_core_mapping *mapping =
520
      sim_core_find_mapping (core, map,
521
                            raddr, /*nr-bytes*/1,
522
                            read_transfer,
523
 
524
    if (mapping == NULL)
525
      break;
526
#if (WITH_DEVICES)
527
    if (mapping->device != NULL)
528
      {
529
        int nr_bytes = len - count;
530
        sim_cia cia = cpu ? CIA_GET (cpu) : NULL_CIA;
531
        if (raddr + nr_bytes - 1> mapping->bound)
532
          nr_bytes = mapping->bound - raddr + 1;
533
        if (device_io_read_buffer (mapping->device,
534
                                   (unsigned_1*)buffer + count,
535
                                   mapping->space,
536
                                   raddr,
537
                                   nr_bytes,
538
                                   sd,
539
                                   cpu,
540
                                   cia) != nr_bytes)
541
          break;
542
        count += nr_bytes;
543
        continue;
544
      }
545
#endif
546
#if (WITH_HW)
547
    if (mapping->device != NULL)
548
      {
549
        int nr_bytes = len - count;
550
        if (raddr + nr_bytes - 1> mapping->bound)
551
          nr_bytes = mapping->bound - raddr + 1;
552
        if (sim_hw_io_read_buffer (sd, mapping->device,
553
                                   (unsigned_1*)buffer + count,
554
                                   mapping->space,
555
                                   raddr,
556
                                   nr_bytes) != nr_bytes)
557
          break;
558
        count += nr_bytes;
559
        continue;
560
      }
561
#endif
562
    ((unsigned_1*)buffer)[count] =
563
      *(unsigned_1*)sim_core_translate(mapping, raddr);
564
    count += 1;
565
 }
566
  return count;
567
}
568
#endif
569
 
570
 
571
#if EXTERN_SIM_CORE_P
572
unsigned
573
sim_core_write_buffer (SIM_DESC sd,
574
                       sim_cpu *cpu,
575
                       unsigned map,
576
                       const void *buffer,
577
                       address_word addr,
578
                       unsigned len)
579
{
580
  sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
581
  unsigned count = 0;
582
  while (count < len)
583
    {
584
      unsigned_word raddr = addr + count;
585
      sim_core_mapping *mapping =
586
        sim_core_find_mapping (core, map,
587
                               raddr, /*nr-bytes*/1,
588
                               write_transfer,
589
 
590
      if (mapping == NULL)
591
        break;
592
#if (WITH_DEVICES)
593
      if (WITH_CALLBACK_MEMORY
594
          && mapping->device != NULL)
595
        {
596
          int nr_bytes = len - count;
597
          sim_cia cia = cpu ? CIA_GET (cpu) : NULL_CIA;
598
          if (raddr + nr_bytes - 1 > mapping->bound)
599
            nr_bytes = mapping->bound - raddr + 1;
600
          if (device_io_write_buffer (mapping->device,
601
                                      (unsigned_1*)buffer + count,
602
                                      mapping->space,
603
                                      raddr,
604
                                      nr_bytes,
605
                                      sd,
606
                                      cpu,
607
                                      cia) != nr_bytes)
608
            break;
609
          count += nr_bytes;
610
          continue;
611
        }
612
#endif
613
#if (WITH_HW)
614
      if (WITH_CALLBACK_MEMORY
615
          && mapping->device != NULL)
616
        {
617
          int nr_bytes = len - count;
618
          if (raddr + nr_bytes - 1 > mapping->bound)
619
            nr_bytes = mapping->bound - raddr + 1;
620
          if (sim_hw_io_write_buffer (sd, mapping->device,
621
                                      (unsigned_1*)buffer + count,
622
                                      mapping->space,
623
                                      raddr,
624
                                      nr_bytes) != nr_bytes)
625
            break;
626
          count += nr_bytes;
627
          continue;
628
        }
629
#endif
630
      *(unsigned_1*)sim_core_translate(mapping, raddr) =
631
        ((unsigned_1*)buffer)[count];
632
      count += 1;
633
    }
634
  return count;
635
}
636
#endif
637
 
638
 
639
#if EXTERN_SIM_CORE_P
640
void
641
sim_core_set_xor (SIM_DESC sd,
642
                  sim_cpu *cpu,
643
                  int is_xor)
644
{
645
  /* set up the XOR map if required. */
646
  if (WITH_XOR_ENDIAN) {
647
    {
648
      sim_core *core = STATE_CORE (sd);
649
      sim_cpu_core *cpu_core = (cpu != NULL ? CPU_CORE (cpu) : NULL);
650
      if (cpu_core != NULL)
651
        {
652
          int i = 1;
653
          unsigned mask;
654
          if (is_xor)
655
            mask = WITH_XOR_ENDIAN - 1;
656
          else
657
            mask = 0;
658
          while (i - 1 < WITH_XOR_ENDIAN)
659
            {
660
              cpu_core->xor[i-1] = mask;
661
              mask = (mask << 1) & (WITH_XOR_ENDIAN - 1);
662
              i = (i << 1);
663
            }
664
        }
665
      else
666
        {
667
          if (is_xor)
668
            core->byte_xor = WITH_XOR_ENDIAN - 1;
669
          else
670
            core->byte_xor = 0;
671
        }
672
    }
673
  }
674
  else {
675
    if (is_xor)
676
      sim_engine_abort (sd, NULL, NULL_CIA,
677
                        "Attempted to enable xor-endian mode when permenantly disabled.");
678
  }
679
}
680
#endif
681
 
682
 
683
#if EXTERN_SIM_CORE_P
684
static void
685
reverse_n (unsigned_1 *dest,
686
           const unsigned_1 *src,
687
           int nr_bytes)
688
{
689
  int i;
690
  for (i = 0; i < nr_bytes; i++)
691
    {
692
      dest [nr_bytes - i - 1] = src [i];
693
    }
694
}
695
#endif
696
 
697
 
698
#if EXTERN_SIM_CORE_P
699
unsigned
700
sim_core_xor_read_buffer (SIM_DESC sd,
701
                          sim_cpu *cpu,
702
                          unsigned map,
703
                          void *buffer,
704
                          address_word addr,
705
                          unsigned nr_bytes)
706
{
707
  address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
708
  if (!WITH_XOR_ENDIAN || !byte_xor)
709
    return sim_core_read_buffer (sd, cpu, map, buffer, addr, nr_bytes);
710
  else
711
    /* only break up transfers when xor-endian is both selected and enabled */
712
    {
713
      unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */
714
      unsigned nr_transfered = 0;
715
      address_word start = addr;
716
      unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
717
      address_word stop;
718
      /* initial and intermediate transfers are broken when they cross
719
         an XOR endian boundary */
720
      while (nr_transfered + nr_this_transfer < nr_bytes)
721
        /* initial/intermediate transfers */
722
        {
723
          /* since xor-endian is enabled stop^xor defines the start
724
             address of the transfer */
725
          stop = start + nr_this_transfer - 1;
726
          SIM_ASSERT (start <= stop);
727
          SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
728
          if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
729
              != nr_this_transfer)
730
            return nr_transfered;
731
          reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
732
          nr_transfered += nr_this_transfer;
733
          nr_this_transfer = WITH_XOR_ENDIAN;
734
          start = stop + 1;
735
        }
736
      /* final transfer */
737
      nr_this_transfer = nr_bytes - nr_transfered;
738
      stop = start + nr_this_transfer - 1;
739
      SIM_ASSERT (stop == (addr + nr_bytes - 1));
740
      if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
741
          != nr_this_transfer)
742
        return nr_transfered;
743
      reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
744
      return nr_bytes;
745
    }
746
}
747
#endif
748
 
749
 
750
#if EXTERN_SIM_CORE_P
751
unsigned
752
sim_core_xor_write_buffer (SIM_DESC sd,
753
                           sim_cpu *cpu,
754
                           unsigned map,
755
                           const void *buffer,
756
                           address_word addr,
757
                           unsigned nr_bytes)
758
{
759
  address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
760
  if (!WITH_XOR_ENDIAN || !byte_xor)
761
    return sim_core_write_buffer (sd, cpu, map, buffer, addr, nr_bytes);
762
  else
763
    /* only break up transfers when xor-endian is both selected and enabled */
764
    {
765
      unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero sized array */
766
      unsigned nr_transfered = 0;
767
      address_word start = addr;
768
      unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
769
      address_word stop;
770
      /* initial and intermediate transfers are broken when they cross
771
         an XOR endian boundary */
772
      while (nr_transfered + nr_this_transfer < nr_bytes)
773
        /* initial/intermediate transfers */
774
        {
775
          /* since xor-endian is enabled stop^xor defines the start
776
             address of the transfer */
777
          stop = start + nr_this_transfer - 1;
778
          SIM_ASSERT (start <= stop);
779
          SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
780
          reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
781
          if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
782
              != nr_this_transfer)
783
            return nr_transfered;
784
          nr_transfered += nr_this_transfer;
785
          nr_this_transfer = WITH_XOR_ENDIAN;
786
          start = stop + 1;
787
        }
788
      /* final transfer */
789
      nr_this_transfer = nr_bytes - nr_transfered;
790
      stop = start + nr_this_transfer - 1;
791
      SIM_ASSERT (stop == (addr + nr_bytes - 1));
792
      reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
793
      if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
794
          != nr_this_transfer)
795
        return nr_transfered;
796
      return nr_bytes;
797
    }
798
}
799
#endif
800
 
801
 
802
 
803
/* define the read/write 1/2/4/8/16/word functions */
804
 
805
#define N 16
806
#include "sim-n-core.h"
807
 
808
#define N 8
809
#include "sim-n-core.h"
810
 
811
#define N 7
812
#define M 8
813
#include "sim-n-core.h"
814
 
815
#define N 6
816
#define M 8
817
#include "sim-n-core.h"
818
 
819
#define N 5
820
#define M 8
821
#include "sim-n-core.h"
822
 
823
#define N 4
824
#include "sim-n-core.h"
825
 
826
#define N 3
827
#define M 4
828
#include "sim-n-core.h"
829
 
830
#define N 2
831
#include "sim-n-core.h"
832
 
833
#define N 1
834
#include "sim-n-core.h"
835
 
836
#endif

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