OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [oc/] [gdb-5.0/] [sim/] [ppc/] [bits.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 106 markom
/*  This file is part of the program psim.
2
 
3
    Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
4
 
5
    This program is free software; you can redistribute it and/or modify
6
    it under the terms of the GNU General Public License as published by
7
    the Free Software Foundation; either version 2 of the License, or
8
    (at your option) any later version.
9
 
10
    This program is distributed in the hope that it will be useful,
11
    but WITHOUT ANY WARRANTY; without even the implied warranty of
12
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
    GNU General Public License for more details.
14
 
15
    You should have received a copy of the GNU General Public License
16
    along with this program; if not, write to the Free Software
17
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
 
19
    */
20
 
21
 
22
#ifndef _BITS_C_
23
#define _BITS_C_
24
 
25
#include "basics.h"
26
 
27
 
28
INLINE_BITS\
29
(unsigned32)
30
MASKED32(unsigned32 word,
31
         unsigned start,
32
         unsigned stop)
33
{
34
  return (word & MASK32(start, stop));
35
}
36
 
37
INLINE_BITS\
38
(unsigned64)
39
MASKED64(unsigned64 word,
40
         unsigned start,
41
         unsigned stop)
42
{
43
  return (word & MASK64(start, stop));
44
}
45
 
46
INLINE_BITS\
47
(unsigned_word)
48
MASKED(unsigned_word word,
49
       unsigned start,
50
       unsigned stop)
51
{
52
  return ((word) & MASK(start, stop));
53
}
54
 
55
 
56
 
57
INLINE_BITS\
58
(unsigned_word)
59
EXTRACTED(unsigned_word word,
60
          unsigned start,
61
          unsigned stop)
62
{
63
  ASSERT(start <= stop);
64
#if (WITH_TARGET_WORD_BITSIZE == 64)
65
  return _EXTRACTEDn(64, word, start, stop);
66
#else
67
  if (stop < 32)
68
    return 0;
69
  else
70
    return ((word >> (63 - stop))
71
            & MASK(start+(63-stop), 63));
72
#endif
73
}
74
 
75
 
76
INLINE_BITS\
77
(unsigned_word)
78
INSERTED(unsigned_word word,
79
         unsigned start,
80
         unsigned stop)
81
{
82
  ASSERT(start <= stop);
83
#if (WITH_TARGET_WORD_BITSIZE == 64)
84
  return _INSERTEDn(64, word, start, stop);
85
#else
86
  if (stop < 32)
87
    return 0;
88
  else
89
    return ((word & MASK(start+(63-stop), 63))
90
            << (63 - stop));
91
#endif
92
}
93
 
94
 
95
INLINE_BITS\
96
(unsigned32)
97
ROTL32(unsigned32 val,
98
       long shift)
99
{
100
  ASSERT(shift >= 0 && shift <= 32);
101
  return _ROTLn(32, val, shift);
102
}
103
 
104
 
105
INLINE_BITS\
106
(unsigned64)
107
ROTL64(unsigned64 val,
108
       long shift)
109
{
110
  ASSERT(shift >= 0 && shift <= 64);
111
  return _ROTLn(64, val, shift);
112
}
113
 
114
#endif /* _BITS_C_ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.