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/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _INTERRUPTS_C_
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#define _INTERRUPTS_C_
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#include <signal.h>
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#include "cpu.h"
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#include "idecode.h"
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#include "os_emul.h"
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/* Operating environment support code
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Unlike the VEA, the OEA must fully model the effect an interrupt
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has on the processors state.
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Each function below return updated values for registers effected by
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interrupts */
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STATIC_INLINE_INTERRUPTS\
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(msreg)
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interrupt_msr(msreg old_msr,
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msreg msr_clear,
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msreg msr_set)
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{
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msreg msr_set_to_0 = (msr_branch_trace_enable
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| msr_data_relocate
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| msr_external_interrupt_enable
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| msr_floating_point_exception_mode_0
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| msr_floating_point_exception_mode_1
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| msr_floating_point_available
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| msr_instruction_relocate
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| msr_power_management_enable
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| msr_problem_state
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| msr_recoverable_interrupt
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| msr_single_step_trace_enable);
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/* remember, in 32bit mode msr_64bit_mode is zero */
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msreg new_msr = ((((old_msr & ~msr_set_to_0)
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| msr_64bit_mode)
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& ~msr_clear)
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| msr_set);
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return new_msr;
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}
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STATIC_INLINE_INTERRUPTS\
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(msreg)
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interrupt_srr1(msreg old_msr,
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msreg srr1_clear,
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msreg srr1_set)
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{
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spreg srr1_mask = (MASK(0,32)
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| MASK(37, 41)
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| MASK(48, 63));
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spreg srr1 = (old_msr & srr1_mask & ~srr1_clear) | srr1_set;
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return srr1;
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}
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STATIC_INLINE_INTERRUPTS\
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(unsigned_word)
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interrupt_base_ea(msreg msr)
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{
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if (msr & msr_interrupt_prefix)
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return MASK(0, 43);
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else
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return 0;
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}
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/* finish off an interrupt for the OEA model, updating all registers
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and forcing a restart of the processor */
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STATIC_INLINE_INTERRUPTS\
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(unsigned_word)
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perform_oea_interrupt(cpu *processor,
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unsigned_word cia,
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unsigned_word vector_offset,
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msreg msr_clear,
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msreg msr_set,
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msreg srr1_clear,
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msreg srr1_set)
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{
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msreg old_msr = MSR;
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msreg new_msr = interrupt_msr(old_msr, msr_clear, msr_set);
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unsigned_word nia;
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if (!(old_msr & msr_recoverable_interrupt)) {
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cpu_error(processor, cia,
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"double interrupt - MSR[RI] bit clear when attempting to deliver interrupt, cia=0x%lx, msr=0x%lx; srr0=0x%lx(cia), srr1=0x%lx(msr); trap-vector=0x%lx, trap-msr=0x%lx",
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(unsigned long)cia,
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(unsigned long)old_msr,
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(unsigned long)SRR0,
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(unsigned long)SRR1,
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(unsigned long)vector_offset,
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(unsigned long)new_msr);
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}
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SRR0 = (spreg)(cia);
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SRR1 = interrupt_srr1(old_msr, srr1_clear, srr1_set);
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MSR = new_msr;
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nia = interrupt_base_ea(new_msr) + vector_offset;
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cpu_synchronize_context(processor, cia);
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return nia;
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}
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INLINE_INTERRUPTS\
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(void)
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machine_check_interrupt(cpu *processor,
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unsigned_word cia)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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cpu_error(processor, cia, "machine-check interrupt");
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case OPERATING_ENVIRONMENT:
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TRACE(trace_interrupts, ("machine-check interrupt - cia=0x%lx\n",
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(unsigned long)cia));
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cia = perform_oea_interrupt(processor, cia, 0x00200, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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default:
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error("internal error - machine_check_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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data_storage_interrupt(cpu *processor,
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unsigned_word cia,
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unsigned_word ea,
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storage_interrupt_reasons reason,
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int is_store)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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error("internal error - data_storage_interrupt - should not be called in VEA mode");
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break;
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case OPERATING_ENVIRONMENT:
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{
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spreg direction = (is_store ? dsisr_store_operation : 0);
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switch (reason) {
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case direct_store_storage_interrupt:
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DSISR = dsisr_direct_store_error_exception | direction;
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break;
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case hash_table_miss_storage_interrupt:
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DSISR = dsisr_hash_table_or_dbat_miss | direction;
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break;
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case protection_violation_storage_interrupt:
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DSISR = dsisr_protection_violation | direction;
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break;
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case earwax_violation_storage_interrupt:
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DSISR = dsisr_earwax_violation | direction;
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break;
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case segment_table_miss_storage_interrupt:
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DSISR = dsisr_segment_table_miss | direction;
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break;
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case earwax_disabled_storage_interrupt:
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DSISR = dsisr_earwax_disabled | direction;
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break;
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default:
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error("internal error - data_storage_interrupt - reason %d not implemented", reason);
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break;
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}
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DAR = (spreg)ea;
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TRACE(trace_interrupts, ("data storage interrupt - cia=0x%lx DAR=0x%lx DSISR=0x%lx\n",
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(unsigned long)cia,
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(unsigned long)DAR,
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(unsigned long)DSISR));
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cia = perform_oea_interrupt(processor, cia, 0x00300, 0, 0, 0, 0);
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cpu_restart(processor, cia);
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}
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default:
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error("internal error - data_storage_interrupt - bad switch");
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}
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}
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INLINE_INTERRUPTS\
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(void)
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instruction_storage_interrupt(cpu *processor,
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unsigned_word cia,
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storage_interrupt_reasons reason)
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{
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switch (CURRENT_ENVIRONMENT) {
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case USER_ENVIRONMENT:
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case VIRTUAL_ENVIRONMENT:
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error("internal error - instruction_storage_interrupt - should not be called in VEA mode");
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case OPERATING_ENVIRONMENT:
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{
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msreg srr1_set;
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switch(reason) {
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case hash_table_miss_storage_interrupt:
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srr1_set = srr1_hash_table_or_ibat_miss;
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break;
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case direct_store_storage_interrupt:
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srr1_set = srr1_direct_store_error_exception;
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break;
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case protection_violation_storage_interrupt:
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srr1_set = srr1_protection_violation;
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break;
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case segment_table_miss_storage_interrupt:
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srr1_set = srr1_segment_table_miss;
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break;
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| 236 |
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default:
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| 237 |
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srr1_set = 0;
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| 238 |
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error("internal error - instruction_storage_interrupt - reason %d not implemented");
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| 239 |
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break;
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| 240 |
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}
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| 241 |
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TRACE(trace_interrupts, ("instruction storage interrupt - cia=0x%lx SRR1|=0x%lx\n",
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(unsigned long)cia,
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| 243 |
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(unsigned long)srr1_set));
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| 244 |
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cia = perform_oea_interrupt(processor, cia, 0x00400, 0, 0, 0, srr1_set);
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| 245 |
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cpu_restart(processor, cia);
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| 246 |
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}
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| 247 |
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| 248 |
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default:
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| 249 |
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error("internal error - instruction_storage_interrupt - bad switch");
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| 250 |
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| 251 |
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}
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| 252 |
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}
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| 253 |
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| 254 |
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| 255 |
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| 256 |
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INLINE_INTERRUPTS\
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| 257 |
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(void)
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| 258 |
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alignment_interrupt(cpu *processor,
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| 259 |
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unsigned_word cia,
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| 260 |
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unsigned_word ra)
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| 261 |
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{
|
| 262 |
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switch (CURRENT_ENVIRONMENT) {
|
| 263 |
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|
| 264 |
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case USER_ENVIRONMENT:
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| 265 |
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case VIRTUAL_ENVIRONMENT:
|
| 266 |
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cpu_error(processor, cia, "alignment interrupt - ra=0x%lx", ra);
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| 267 |
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| 268 |
|
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case OPERATING_ENVIRONMENT:
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| 269 |
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DAR = (spreg)ra;
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| 270 |
|
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DSISR = 0; /* FIXME */
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| 271 |
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TRACE(trace_interrupts, ("alignment interrupt - cia=0x%lx DAR=0x%lx DSISR=0x%lx\n",
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| 272 |
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(unsigned long)cia,
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| 273 |
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(unsigned long)DAR,
|
| 274 |
|
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(unsigned long)DSISR));
|
| 275 |
|
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cia = perform_oea_interrupt(processor, cia, 0x00600, 0, 0, 0, 0);
|
| 276 |
|
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cpu_restart(processor, cia);
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| 277 |
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|
| 278 |
|
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default:
|
| 279 |
|
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error("internal error - alignment_interrupt - bad switch");
|
| 280 |
|
|
|
| 281 |
|
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}
|
| 282 |
|
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}
|
| 283 |
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|
| 284 |
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|
| 285 |
|
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|
| 286 |
|
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|
| 287 |
|
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INLINE_INTERRUPTS\
|
| 288 |
|
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(void)
|
| 289 |
|
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program_interrupt(cpu *processor,
|
| 290 |
|
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unsigned_word cia,
|
| 291 |
|
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program_interrupt_reasons reason)
|
| 292 |
|
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{
|
| 293 |
|
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switch (CURRENT_ENVIRONMENT) {
|
| 294 |
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|
|
| 295 |
|
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case USER_ENVIRONMENT:
|
| 296 |
|
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case VIRTUAL_ENVIRONMENT:
|
| 297 |
|
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switch (reason) {
|
| 298 |
|
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case floating_point_enabled_program_interrupt:
|
| 299 |
|
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cpu_error(processor, cia, "program interrupt - %s",
|
| 300 |
|
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"floating point enabled");
|
| 301 |
|
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break;
|
| 302 |
|
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case illegal_instruction_program_interrupt:
|
| 303 |
|
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cpu_error(processor, cia, "program interrupt - %s",
|
| 304 |
|
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"illegal instruction");
|
| 305 |
|
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break;
|
| 306 |
|
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case privileged_instruction_program_interrupt:
|
| 307 |
|
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cpu_error(processor, cia, "program interrupt - %s",
|
| 308 |
|
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"privileged instruction");
|
| 309 |
|
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break;
|
| 310 |
|
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case trap_program_interrupt:
|
| 311 |
|
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cpu_error(processor, cia, "program interrupt - %s",
|
| 312 |
|
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"trap");
|
| 313 |
|
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break;
|
| 314 |
|
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case optional_instruction_program_interrupt:
|
| 315 |
|
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cpu_error(processor, cia, "program interrupt - %s",
|
| 316 |
|
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"illegal instruction (optional instruction not supported)");
|
| 317 |
|
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break;
|
| 318 |
|
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case mpc860c0_instruction_program_interrupt:
|
| 319 |
|
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cpu_error(processor, cia, "program interrupt - %s",
|
| 320 |
|
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"problematic branch detected, see MPC860 C0 errata");
|
| 321 |
|
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break;
|
| 322 |
|
|
default:
|
| 323 |
|
|
error("internal error - program_interrupt - reason %d not implemented", reason);
|
| 324 |
|
|
}
|
| 325 |
|
|
|
| 326 |
|
|
case OPERATING_ENVIRONMENT:
|
| 327 |
|
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{
|
| 328 |
|
|
msreg srr1_set;
|
| 329 |
|
|
switch (reason) {
|
| 330 |
|
|
case floating_point_enabled_program_interrupt:
|
| 331 |
|
|
srr1_set = srr1_floating_point_enabled;
|
| 332 |
|
|
break;
|
| 333 |
|
|
case optional_instruction_program_interrupt:
|
| 334 |
|
|
case illegal_instruction_program_interrupt:
|
| 335 |
|
|
srr1_set = srr1_illegal_instruction;
|
| 336 |
|
|
break;
|
| 337 |
|
|
case privileged_instruction_program_interrupt:
|
| 338 |
|
|
srr1_set = srr1_priviliged_instruction;
|
| 339 |
|
|
break;
|
| 340 |
|
|
case trap_program_interrupt:
|
| 341 |
|
|
srr1_set = srr1_trap;
|
| 342 |
|
|
break;
|
| 343 |
|
|
case mpc860c0_instruction_program_interrupt:
|
| 344 |
|
|
srr1_set = 0;
|
| 345 |
|
|
cpu_error(processor, cia, "program interrupt - %s",
|
| 346 |
|
|
"problematic branch detected, see MPC860 C0 errata");
|
| 347 |
|
|
break;
|
| 348 |
|
|
default:
|
| 349 |
|
|
srr1_set = 0;
|
| 350 |
|
|
error("internal error - program_interrupt - reason %d not implemented", reason);
|
| 351 |
|
|
break;
|
| 352 |
|
|
}
|
| 353 |
|
|
TRACE(trace_interrupts, ("program interrupt - cia=0x%lx SRR1|=0x%lx\n",
|
| 354 |
|
|
(unsigned long)cia,
|
| 355 |
|
|
(unsigned long)srr1_set));
|
| 356 |
|
|
cia = perform_oea_interrupt(processor, cia, 0x00700, 0, 0, 0, srr1_set);
|
| 357 |
|
|
cpu_restart(processor, cia);
|
| 358 |
|
|
}
|
| 359 |
|
|
|
| 360 |
|
|
default:
|
| 361 |
|
|
error("internal error - program_interrupt - bad switch");
|
| 362 |
|
|
|
| 363 |
|
|
}
|
| 364 |
|
|
}
|
| 365 |
|
|
|
| 366 |
|
|
|
| 367 |
|
|
INLINE_INTERRUPTS\
|
| 368 |
|
|
(void)
|
| 369 |
|
|
floating_point_unavailable_interrupt(cpu *processor,
|
| 370 |
|
|
unsigned_word cia)
|
| 371 |
|
|
{
|
| 372 |
|
|
switch (CURRENT_ENVIRONMENT) {
|
| 373 |
|
|
|
| 374 |
|
|
case USER_ENVIRONMENT:
|
| 375 |
|
|
case VIRTUAL_ENVIRONMENT:
|
| 376 |
|
|
cpu_error(processor, cia, "floating-point unavailable interrupt");
|
| 377 |
|
|
|
| 378 |
|
|
case OPERATING_ENVIRONMENT:
|
| 379 |
|
|
TRACE(trace_interrupts, ("floating-point unavailable interrupt - cia=0x%lx\n",
|
| 380 |
|
|
(unsigned long)cia));
|
| 381 |
|
|
cia = perform_oea_interrupt(processor, cia, 0x00800, 0, 0, 0, 0);
|
| 382 |
|
|
cpu_restart(processor, cia);
|
| 383 |
|
|
|
| 384 |
|
|
default:
|
| 385 |
|
|
error("internal error - floating_point_unavailable_interrupt - bad switch");
|
| 386 |
|
|
|
| 387 |
|
|
}
|
| 388 |
|
|
}
|
| 389 |
|
|
|
| 390 |
|
|
|
| 391 |
|
|
INLINE_INTERRUPTS\
|
| 392 |
|
|
(void)
|
| 393 |
|
|
system_call_interrupt(cpu *processor,
|
| 394 |
|
|
unsigned_word cia)
|
| 395 |
|
|
{
|
| 396 |
|
|
TRACE(trace_interrupts, ("system-call interrupt - cia=0x%lx\n", (unsigned long)cia));
|
| 397 |
|
|
|
| 398 |
|
|
switch (CURRENT_ENVIRONMENT) {
|
| 399 |
|
|
|
| 400 |
|
|
case USER_ENVIRONMENT:
|
| 401 |
|
|
case VIRTUAL_ENVIRONMENT:
|
| 402 |
|
|
os_emul_system_call(processor, cia);
|
| 403 |
|
|
cpu_restart(processor, cia+4);
|
| 404 |
|
|
|
| 405 |
|
|
case OPERATING_ENVIRONMENT:
|
| 406 |
|
|
cia = perform_oea_interrupt(processor, cia+4, 0x00c00, 0, 0, 0, 0);
|
| 407 |
|
|
cpu_restart(processor, cia);
|
| 408 |
|
|
|
| 409 |
|
|
default:
|
| 410 |
|
|
error("internal error - system_call_interrupt - bad switch");
|
| 411 |
|
|
|
| 412 |
|
|
}
|
| 413 |
|
|
}
|
| 414 |
|
|
|
| 415 |
|
|
INLINE_INTERRUPTS\
|
| 416 |
|
|
(void)
|
| 417 |
|
|
floating_point_assist_interrupt(cpu *processor,
|
| 418 |
|
|
unsigned_word cia)
|
| 419 |
|
|
{
|
| 420 |
|
|
switch (CURRENT_ENVIRONMENT) {
|
| 421 |
|
|
|
| 422 |
|
|
case USER_ENVIRONMENT:
|
| 423 |
|
|
case VIRTUAL_ENVIRONMENT:
|
| 424 |
|
|
cpu_error(processor, cia, "floating-point assist interrupt");
|
| 425 |
|
|
|
| 426 |
|
|
case OPERATING_ENVIRONMENT:
|
| 427 |
|
|
TRACE(trace_interrupts, ("floating-point assist interrupt - cia=0x%lx\n", (unsigned long)cia));
|
| 428 |
|
|
cia = perform_oea_interrupt(processor, cia, 0x00e00, 0, 0, 0, 0);
|
| 429 |
|
|
cpu_restart(processor, cia);
|
| 430 |
|
|
|
| 431 |
|
|
default:
|
| 432 |
|
|
error("internal error - floating_point_assist_interrupt - bad switch");
|
| 433 |
|
|
|
| 434 |
|
|
}
|
| 435 |
|
|
}
|
| 436 |
|
|
|
| 437 |
|
|
|
| 438 |
|
|
|
| 439 |
|
|
/* handle an externally generated event or an interrupt that has just
|
| 440 |
|
|
been enabled through changes to the MSR. */
|
| 441 |
|
|
|
| 442 |
|
|
STATIC_INLINE_INTERRUPTS\
|
| 443 |
|
|
(void)
|
| 444 |
|
|
deliver_hardware_interrupt(void *data)
|
| 445 |
|
|
{
|
| 446 |
|
|
cpu *processor = (cpu*)data;
|
| 447 |
|
|
interrupts *ints = cpu_interrupts(processor);
|
| 448 |
|
|
ints->delivery_scheduled = NULL;
|
| 449 |
|
|
if ((cpu_registers(processor)->msr & (msr_floating_point_exception_mode_0
|
| 450 |
|
|
| msr_floating_point_exception_mode_1))
|
| 451 |
|
|
&& cpu_registers(processor)->fpscr & fpscr_fex) {
|
| 452 |
|
|
msreg srr1_set = srr1_floating_point_enabled | srr1_subsequent_instruction;
|
| 453 |
|
|
unsigned_word cia = cpu_get_program_counter(processor);
|
| 454 |
|
|
unsigned_word nia = perform_oea_interrupt(processor,
|
| 455 |
|
|
cia, 0x00700, 0, 0, 0, srr1_set);
|
| 456 |
|
|
cpu_set_program_counter(processor, nia);
|
| 457 |
|
|
}
|
| 458 |
|
|
else if (cpu_registers(processor)->msr & msr_external_interrupt_enable) {
|
| 459 |
|
|
/* external interrupts have a high priority and remain pending */
|
| 460 |
|
|
if (ints->pending_interrupts & external_interrupt_pending) {
|
| 461 |
|
|
unsigned_word cia = cpu_get_program_counter(processor);
|
| 462 |
|
|
unsigned_word nia = perform_oea_interrupt(processor,
|
| 463 |
|
|
cia, 0x00500, 0, 0, 0, 0);
|
| 464 |
|
|
TRACE(trace_interrupts, ("external interrupt - cia=0x%lx\n", (unsigned long)cia));
|
| 465 |
|
|
cpu_set_program_counter(processor, nia);
|
| 466 |
|
|
}
|
| 467 |
|
|
/* decrementer interrupts have a lower priority and are once only */
|
| 468 |
|
|
else if (ints->pending_interrupts & decrementer_interrupt_pending) {
|
| 469 |
|
|
unsigned_word cia = cpu_get_program_counter(processor);
|
| 470 |
|
|
unsigned_word nia = perform_oea_interrupt(processor,
|
| 471 |
|
|
cia, 0x00900, 0, 0, 0, 0);
|
| 472 |
|
|
TRACE(trace_interrupts, ("decrementer interrupt - cia 0x%lx, time %ld\n",
|
| 473 |
|
|
(unsigned long)cia,
|
| 474 |
|
|
(unsigned long)event_queue_time(psim_event_queue(cpu_system(processor)))
|
| 475 |
|
|
));
|
| 476 |
|
|
cpu_set_program_counter(processor, nia);
|
| 477 |
|
|
ints->pending_interrupts &= ~decrementer_interrupt_pending;
|
| 478 |
|
|
}
|
| 479 |
|
|
}
|
| 480 |
|
|
}
|
| 481 |
|
|
|
| 482 |
|
|
STATIC_INLINE_INTERRUPTS\
|
| 483 |
|
|
(void)
|
| 484 |
|
|
schedule_hardware_interrupt_delivery(cpu *processor)
|
| 485 |
|
|
{
|
| 486 |
|
|
interrupts *ints = cpu_interrupts(processor);
|
| 487 |
|
|
if (ints->delivery_scheduled == NULL) {
|
| 488 |
|
|
ints->delivery_scheduled =
|
| 489 |
|
|
event_queue_schedule(psim_event_queue(cpu_system(processor)),
|
| 490 |
|
|
0, deliver_hardware_interrupt, processor);
|
| 491 |
|
|
}
|
| 492 |
|
|
}
|
| 493 |
|
|
|
| 494 |
|
|
|
| 495 |
|
|
INLINE_INTERRUPTS\
|
| 496 |
|
|
(void)
|
| 497 |
|
|
check_masked_interrupts(cpu *processor)
|
| 498 |
|
|
{
|
| 499 |
|
|
if (((cpu_registers(processor)->msr & (msr_floating_point_exception_mode_0
|
| 500 |
|
|
| msr_floating_point_exception_mode_1))
|
| 501 |
|
|
&& cpu_registers(processor)->fpscr & fpscr_fex)
|
| 502 |
|
|
|| ((cpu_registers(processor)->msr & msr_external_interrupt_enable)
|
| 503 |
|
|
&& (cpu_interrupts(processor)->pending_interrupts)))
|
| 504 |
|
|
schedule_hardware_interrupt_delivery(processor);
|
| 505 |
|
|
}
|
| 506 |
|
|
|
| 507 |
|
|
INLINE_INTERRUPTS\
|
| 508 |
|
|
(void)
|
| 509 |
|
|
decrementer_interrupt(cpu *processor)
|
| 510 |
|
|
{
|
| 511 |
|
|
interrupts *ints = cpu_interrupts(processor);
|
| 512 |
|
|
ints->pending_interrupts |= decrementer_interrupt_pending;
|
| 513 |
|
|
if (cpu_registers(processor)->msr & msr_external_interrupt_enable) {
|
| 514 |
|
|
schedule_hardware_interrupt_delivery(processor);
|
| 515 |
|
|
}
|
| 516 |
|
|
}
|
| 517 |
|
|
|
| 518 |
|
|
INLINE_INTERRUPTS\
|
| 519 |
|
|
(void)
|
| 520 |
|
|
external_interrupt(cpu *processor,
|
| 521 |
|
|
int is_asserted)
|
| 522 |
|
|
{
|
| 523 |
|
|
interrupts *ints = cpu_interrupts(processor);
|
| 524 |
|
|
if (is_asserted) {
|
| 525 |
|
|
if (!ints->pending_interrupts & external_interrupt_pending) {
|
| 526 |
|
|
ints->pending_interrupts |= external_interrupt_pending;
|
| 527 |
|
|
if (cpu_registers(processor)->msr & msr_external_interrupt_enable)
|
| 528 |
|
|
schedule_hardware_interrupt_delivery(processor);
|
| 529 |
|
|
}
|
| 530 |
|
|
else {
|
| 531 |
|
|
/* check that we haven't missed out on a chance to deliver an
|
| 532 |
|
|
interrupt */
|
| 533 |
|
|
ASSERT(!(cpu_registers(processor)->msr & msr_external_interrupt_enable));
|
| 534 |
|
|
}
|
| 535 |
|
|
}
|
| 536 |
|
|
else {
|
| 537 |
|
|
ints->pending_interrupts &= ~external_interrupt_pending;
|
| 538 |
|
|
}
|
| 539 |
|
|
}
|
| 540 |
|
|
|
| 541 |
|
|
#endif /* _INTERRUPTS_C_ */
|
