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[/] [or1k/] [branches/] [oc/] [gdb-5.0/] [sim/] [ppc/] [vm.h] - Blame information for rev 1771

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1 106 markom
/*  This file is part of the program psim.
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    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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    This program is free software; you can redistribute it and/or modify
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    it under the terms of the GNU General Public License as published by
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    the Free Software Foundation; either version 2 of the License, or
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    (at your option) any later version.
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    This program is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with this program; if not, write to the Free Software
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    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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    */
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#ifndef _VM_H_
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#define _VM_H_
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typedef struct _vm vm;
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typedef struct _vm_data_map vm_data_map;
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typedef struct _vm_instruction_map vm_instruction_map;
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/* each PowerPC requires two virtual memory maps */
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INLINE_VM\
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(vm *) vm_create
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(core *memory);
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INLINE_VM\
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(vm_data_map *) vm_create_data_map
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(vm *memory);
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INLINE_VM\
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(vm_instruction_map *) vm_create_instruction_map
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(vm *memory);
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/* address translation, if the translation is invalid
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   these will not return */
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INLINE_VM\
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(unsigned_word) vm_real_data_addr
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(vm_data_map *data_map,
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 unsigned_word ea,
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 int is_read,
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 cpu *processor,
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 unsigned_word cia);
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INLINE_VM\
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(unsigned_word) vm_real_instruction_addr
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(vm_instruction_map *instruction_map,
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 cpu *processor,
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 unsigned_word cia);
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/* generic block transfers.  Dependant on the presence of the
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   PROCESSOR arg, either returns the number of bytes transfered or (if
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   PROCESSOR is non NULL) aborts the simulation */
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INLINE_VM\
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(int) vm_data_map_read_buffer
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(vm_data_map *map,
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 void *target,
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 unsigned_word addr,
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 unsigned len,
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 cpu *processor,
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 unsigned_word cia);
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INLINE_VM\
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(int) vm_data_map_write_buffer
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(vm_data_map *map,
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 const void *source,
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 unsigned_word addr,
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 unsigned len,
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 int violate_read_only_section,
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 cpu *processor,
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 unsigned_word cia);
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/* fetch the next instruction from memory */
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INLINE_VM\
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(instruction_word) vm_instruction_map_read
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(vm_instruction_map *instruction_map,
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 cpu *processor,
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 unsigned_word cia);
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/* read data from memory */
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#define DECLARE_VM_DATA_MAP_READ_N(N) \
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INLINE_VM\
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(unsigned_##N) vm_data_map_read_##N \
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(vm_data_map *map, \
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 unsigned_word ea, \
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 cpu *processor, \
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 unsigned_word cia);
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DECLARE_VM_DATA_MAP_READ_N(1)
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DECLARE_VM_DATA_MAP_READ_N(2)
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DECLARE_VM_DATA_MAP_READ_N(4)
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DECLARE_VM_DATA_MAP_READ_N(8)
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DECLARE_VM_DATA_MAP_READ_N(word)
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/* write data to memory */
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#define DECLARE_VM_DATA_MAP_WRITE_N(N) \
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INLINE_VM\
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(void) vm_data_map_write_##N \
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(vm_data_map *map, \
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 unsigned_word addr, \
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 unsigned_##N val, \
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 cpu *processor, \
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 unsigned_word cia);
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DECLARE_VM_DATA_MAP_WRITE_N(1)
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DECLARE_VM_DATA_MAP_WRITE_N(2)
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DECLARE_VM_DATA_MAP_WRITE_N(4)
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DECLARE_VM_DATA_MAP_WRITE_N(8)
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DECLARE_VM_DATA_MAP_WRITE_N(word)
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/* update vm data structures due to a synchronization point */
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INLINE_VM\
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(void) vm_synchronize_context
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(vm *memory,
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 spreg *sprs,
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 sreg *srs,
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 msreg msr,
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 /**/
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 cpu *processor,
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 unsigned_word cia);
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/* update vm data structures due to a TLB operation */
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INLINE_VM\
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(void) vm_page_tlb_invalidate_entry
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(vm *memory,
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 unsigned_word ea);
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INLINE_VM\
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(void) vm_page_tlb_invalidate_all
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(vm *memory);
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#endif

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