OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [oc/] [insight/] [gdb/] [or1k-tdep.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 104 markom
/* Target-dependent code for the or1k architecture, for GDB, the GNU Debugger.
2
   Copyright 1988-1999, Free Software Foundation, Inc.
3
   Contributed by Alessandro Forin(af@cs.cmu.edu at CMU
4
   and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 2 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program; if not, write to the Free Software
20
   Foundation, Inc., 59 Temple Place - Suite 330,
21
   Boston, MA 02111-1307, USA.  */
22
 
23
#include "defs.h"
24
#include "gdb_string.h"
25
#include "frame.h"
26
#include "inferior.h"
27
#include "symtab.h"
28
#include "value.h"
29
#include "gdbcmd.h"
30
#include "language.h"
31
#include "gdbcore.h"
32
#include "symfile.h"
33
#include "objfiles.h"
34
#include "gdbtypes.h"
35
#include "target.h"
36
 
37
#include "opcode/or32.h"
38
 
39
/* *INDENT-OFF* */
40
 
41
/* Group reg name size.  See or1k_reg_names.  */
42
int or1k_group_name_sizes[OR1K_NUM_SPR_GROUPS] = {
43
  64, 0, 0, 0, 0, 0, (24+32+32), 0, 0, 0 };
44
 
45
/* Generated reg names.  See or1k_internal_reg_name.  */
46
int or1k_spr_valid_aliases[OR1K_NUM_SPR_GROUPS] = {
47
  64, 515, 0, 0, 0, 0, (24+32+32), 0, 0, 0 };
48
 
49
/* Register names.  */
50
char *or1k_reg_names[] = {
51
  /* group 0 - general*/
52
  "?", "VR", "UPR", "SR", "EPCR0", "?", "?", "?",
53
  "?", "?", "?", "?", "?", "?", "?", "?",
54
  "EPCR0", "EPCR1", "EPCR2", "EPCR3", "EPCR4", "EPCR5", "EPCR6", "EPCR7",
55
  "EPCR8", "EPCR9", "EPCR10", "EPCR11", "EPCR12", "EPCR13", "EPCR14", "EPCR15",
56
  "EEAR0","EEAR1", "EEAR2", "EEAR3", "EEAR4", "EEAR5", "EEAR6", "EEAR7",
57
  "EEAR8", "EEAR9", "EEAR10", "EEAR11", "EEAR12", "EEAR13", "EEAR14", "EEAR15",
58
  "ESR0", "ESR1", "ESR2", "ESR3", "ESR4", "ESR5", "ESR6", "ESR7",
59
  "ESR8", "ESR9", "ESR10", "ESR11", "ESR12", "ESR13", "ESR14", "ESR15",
60
  /* group 1 - Data MMU - not listed, generated */
61
  /* group 6 - debug */
62
  "DVR0", "DVR1", "DVR2", "DVR3", "DVR4", "DVR5", "DVR6", "DVR7",
63
  "DCR0", "DCR1", "DCR2", "DCR3", "DCR4", "DCR5", "DCR6", "DCR7",
64
  "DMR1", "DMR2", "DCWR0", "DCWR1", "DSR", "DRR", "PC", "?",
65
 
66
  /* general purpose registers */
67
  "ZERO", "SP", "FP", "A0", "A1", "A2", "A3", "A4",
68
  "A5", "LR", "R10", "RV", "R12", "R13", "R14", "R15",
69
  "R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23",
70
  "R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
71
  /* vector/floating point registers */
72
  "VFA0",  "VFA1",  "VFA2",  "VFA3",  "VFA4",  "VFA5",  "VFRV ", "VFR7",
73
  "VFR8",   "VFR9",  "VFR10", "VFR11", "VFR12", "VFR13", "VFR14", "VFR15",
74
  "VFR16", "VFR17", "VFR18", "VFR19", "VFR20", "VFR21", "VFR22", "VFR23",
75
  "VFR24", "VFR25", "VFR26", "VFR27", "VFR28", "VFR29", "VFR30", "VFR31"
76
};
77
 
78
static char *or1k_group_names[] = {
79
  "SYS", "DMMU", "IMMU", "DCACHE", "ICACHE", "MAC", "DEBUG", "PERF", "POWER",
80
  "PIC", "TIMER"
81
};
82
/* *INDENT-ON* */
83
 
84
/* The list of available "set or1k " and "show or1k " commands */
85
static struct cmd_list_element *setor1kcmdlist = NULL;
86
static struct cmd_list_element *showor1kcmdlist = NULL;
87
 
88
/* List of all saved register addresses, produced by skip_prologue.
89
   Relative address to sp, not used if 0.  */
90
static int or1k_saved_reg_addr[NUM_REGS];
91
 
92
 
93
/* Converts regno to sprno.  or1k debug unit has GPRs mapped to SPRs,
94
   which are not compact, so we are mapping them for GDB.  */
95
int
96
or1k_regnum_to_sprnum (int regno)
97
{
98
  if (regno < MAX_GPR_REGS + MAX_VF_REGS)
99
    return SPR_REG(SPR_DEBUG_GROUP, regno + SPR_GPR);
100
  if (regno == PC_REGNUM)
101
    return PC_SPRNUM;
102
  if (regno == PS_REGNUM)
103
    return SR_SPRNUM;
104
  if (regno == CCR_REGNUM)
105
    return CCR_SPRNUM(0);
106
  error ("Invalid register number!");
107
}
108
 
109
/* Builds and returns register name.  */
110
 
111
static char tmp_name[16];
112
static char *
113
or1k_internal_register_name (i)
114
     int i;
115
{
116
  int group = i >> SPR_GROUP_SIZE_BITS;
117
  int index = i & (SPR_GROUP_SIZE - 1);
118
  switch (group)
119
    {
120
      /* Names covered in or1k_reg_names.  */
121
    case 0:
122
    case 6:
123
      {
124
        int group_start = 0;
125
        for (i = 0; i < group; i++)
126
          group_start += or1k_group_name_sizes[i];
127
 
128
        if (index >= or1k_group_name_sizes[group])
129
          {
130
            sprintf (tmp_name, "SPR%i_%i", group, index);
131
            return (char *)&tmp_name;
132
          }
133
        else
134
          return or1k_reg_names[group_start + index];
135
      }
136
      /* Build names for MMU group.  */
137
    case 1:
138
      if (index < 256) {
139
        sprintf (tmp_name, "DTLBMR%i", index);
140
        return (char *)&tmp_name;
141
      }
142
      index -= 256;
143
      if (index < 256) {
144
        sprintf (tmp_name, "DTLBTR%i", index);
145
        return (char *)&tmp_name;
146
      }
147
      index -= 256;
148
      switch (index)
149
        {
150
        case 0:
151
          return "DMMUCR";
152
        case 1:
153
          return "DMMUPR";
154
        case 2:
155
          return "DTLBEIR";
156
        default:
157
          sprintf (tmp_name, "SPR1_%i", index+512);
158
          return (char *)&tmp_name;
159
      }
160
    default:
161
      sprintf (tmp_name, "SPR%i_%i", group, index);
162
      return (char *)&tmp_name;
163
    }
164
}
165
 
166
/* Get register index in group from name.  Negative if no match.  */
167
 
168
static int
169
or1k_regno_from_name (group, name)
170
     int group;
171
     char *name;
172
{
173
  int i;
174
  if (toupper(name[0]) == 'S' && toupper(name[1]) == 'P' && toupper(name[2]) == 'R')
175
    {
176
      char *ptr_c;
177
      name += 3;
178
      i = (int) strtoul (name, &ptr_c, 10);
179
      if (*ptr_c != '_' || i != group)
180
        return -1;
181
      ptr_c++;
182
      i = (int) strtoul (name, &ptr_c, 10);
183
      if (*ptr_c)
184
        return -1;
185
      else return i;
186
    }
187
  for (i = 0; i < or1k_spr_valid_aliases[group]; i++)
188
    {
189
      char *s;
190
      s = or1k_internal_register_name (SPR_REG(group, i));
191
      if (strcasecmp (name, s) == 0)
192
        return i;
193
    }
194
  return -1;
195
}
196
 
197
#define OR1K_BREAKPOINT_STRUCT {0x21, 0x00, 0x00, 0x00}
198
 
199
/* Resturs gdb register name.  */
200
char *
201
or1k_register_name (regno)
202
     int regno;
203
{
204
  return or1k_internal_register_name (REGNUM_TO_SPRNUM(regno));
205
}
206
 
207
/* Given the address at which to insert a breakpoint (BP_ADDR),
208
   what will that breakpoint be?
209
 
210
   For or1k, we have a breakpoint instruction. Since all or1k
211
   instructions are 32 bits, this is all we need, regardless of
212
   address. K is not used.  */
213
 
214
unsigned char *
215
or1k_breakpoint_from_pc (bp_addr, bp_size)
216
     CORE_ADDR * bp_addr;
217
     int *bp_size;
218
{
219
  static char breakpoint[] = OR1K_BREAKPOINT_STRUCT;
220
  *bp_size = OR1K_INSTLEN;
221
  return breakpoint;
222
}
223
 
224
/* Given a return value in `regbuf' with a type `valtype', extract and
225
   copy its value into `valbuf'. */
226
void
227
or1k_extract_return_value (valtype, regbuf, valbuf)
228
     struct type *valtype;
229
     char regbuf[REGISTER_BYTES];
230
     char *valbuf;
231
{
232
  if (TYPE_CODE_FLT == TYPE_CODE (valtype))
233
    memcpy (valbuf, &regbuf[REGISTER_BYTE (VFRV_REGNUM)], TYPE_LENGTH (valtype));
234
  else
235
    memcpy (valbuf, &regbuf[REGISTER_BYTE (RV_REGNUM)], TYPE_LENGTH (valtype));
236
}
237
 
238
/* The or1k cc defines the following
239
   prologue:
240
00000000 <_proc1>:
241
   0:   d7 e1 17 e4     l.sw 0xffffffe4(r1),r2
242
   4:   9c 41 00 00     l.addi r2,r1,0x0
243
   8:   9c 21 ff e8     l.addi r1,r1,0xffffffe8
244
   c:   d7 e2 1f f8     l.sw 0xfffffff8(r2),r3
245
  10:   d7 e2 27 f4     l.sw 0xfffffff4(r2),r4
246
  14:   84 82 ff f8     l.lwz r4,0xfffffff8(r2)
247
  18:   9d 24 00 00     l.addi r9,r4,0x0
248
  1c:   00 00 00 02     l.j 0x2
249
  20:   15 00 00 00     l.nop
250
 
251
00000024 <_L2>:
252
  24:   84 41 ff fc     l.lwz r2,0xfffffffc(r1)
253
  28:   48 00 58 00     l.jalr r11
254
  2c:   9c 21 00 18     l.addi r1,r1,0x18 */
255
 
256
CORE_ADDR
257
or1k_skip_prologue (CORE_ADDR pc)
258
{
259
  unsigned long inst;
260
  CORE_ADDR skip_pc;
261
  CORE_ADDR func_addr, func_end;
262
  struct symtab_and_line sal;
263
  int i;
264
  int offset = 0;
265
 
266
  for (i = 0; i < MAX_GPR_REGS; i++)
267
    or1k_saved_reg_addr[i] = -1;
268
 
269
  /* Is there a prologue?  */
270
  inst = or1k_fetch_instruction (pc);
271
  if (inst & 0xfc1ff800 != 0xd4011000) return pc; /* l.sw I(r1),r2 */
272
  or1k_saved_reg_addr[2] = offset++;
273
  inst = or1k_fetch_instruction (pc + OR1K_INSTLEN);
274
  if (inst & 0xFFFF0000 != 0x9c410000) return pc; /* l.addi r2,r1,I */
275
  pc += 2 * OR1K_INSTLEN;
276
  inst = or1k_fetch_instruction (pc);
277
  if (inst & 0xFFFF0000 != 0x9c210000) return pc; /* l.addi r1,r1,I */
278
  pc += OR1K_INSTLEN;
279
 
280
  /* Skip stored registers.  */
281
  inst = or1k_fetch_instruction (pc);
282
  while (inst & 0xfc1ff800 != 0xd4020000)         /* l.sw 0x0(r2),rx */
283
    {
284
      /* get saved reg. */
285
      or1k_saved_reg_addr[(inst >> 11) & 0x1f] = offset++;
286
      pc += OR1K_INSTLEN;
287
      inst = or1k_fetch_instruction (pc);
288
    }
289
  return pc;
290
}
291
 
292
/* Determines whether this function has frame.  */
293
 
294
int
295
or1k_frameless_function_invocation (struct frame_info *fi)
296
{
297
  CORE_ADDR func_start, after_prologue;
298
  int frameless;
299
  func_start = (get_pc_function_start ((fi)->pc) + FUNCTION_START_OFFSET);
300
  after_prologue = SKIP_PROLOGUE (func_start);
301
 
302
  /* If we don't skip pc, we don't have even shortest possible  prologue.  */
303
  frameless = (after_prologue <= func_start);
304
  return frameless;
305
}
306
 
307
/* Given a GDB frame, determine the address of the calling function's frame.
308
   This will be used to create a new GDB frame struct, and then
309
   INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
310
 
311
CORE_ADDR
312
or1k_frame_chain (frame)
313
     struct frame_info *frame;
314
{
315
  CORE_ADDR fp;
316
  if (USE_GENERIC_DUMMY_FRAMES)
317
    {
318
      if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
319
        return frame->frame;    /* dummy frame same as caller's frame */
320
    }
321
 
322
  if (inside_entry_file (frame->pc) ||
323
      frame->pc == entry_point_address ())
324
    return 0;
325
 
326
  if (frame->signal_handler_caller)
327
    fp = read_memory_integer (frame->frame, 4);
328
  else if (frame->next != NULL
329
           && frame->next->signal_handler_caller
330
           && FRAMELESS_FUNCTION_INVOCATION (frame))
331
    /* A frameless function interrupted by a signal did not change the
332
       frame pointer.  */
333
    fp = FRAME_FP (frame);
334
  else
335
    fp = read_memory_integer (frame->frame, 4);
336
 
337
  if (USE_GENERIC_DUMMY_FRAMES)
338
    {
339
      CORE_ADDR fpp, lr;
340
 
341
      lr = read_register (LR_REGNUM);
342
      if (lr == entry_point_address ())
343
        if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
344
          if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
345
            return fpp;
346
    }
347
 
348
  return fp;
349
}
350
 
351
/* The code to store, into a struct frame_saved_regs,
352
   the addresses of the saved registers of frame described by FRAME_INFO.
353
   This includes special registers such as pc and fp saved in special
354
   ways in the stack frame.  sp is even more special:
355
   the address we return for it IS the sp for the next frame.  */
356
void
357
or1k_init_saved_regs (struct frame_info *fi)
358
{
359
  CORE_ADDR frame_addr;
360
  int i;
361
  frame_saved_regs_zalloc (fi);
362
 
363
  /* Skip prologue sets or1k_saved_reg_addr[], we will use it later.  */
364
  or1k_skip_prologue (get_pc_function_start ((fi)->pc) + FUNCTION_START_OFFSET);
365
 
366
  for (i = 0; i < NUM_GPR_REGS+NUM_VF_REGS; i++)
367
    if (or1k_saved_reg_addr[i] >= 0)
368
      fi->saved_regs[i] = fi->frame + or1k_saved_reg_addr[i];
369
}
370
 
371
 
372
static CORE_ADDR
373
read_next_frame_reg (fi, regno)
374
     struct frame_info *fi;
375
     int regno;
376
{
377
  for (; fi; fi = fi->next)
378
    {
379
      /* We have to get the saved sp from the sigcontext
380
         if it is a signal handler frame.  */
381
      if (regno == SP_REGNUM && !fi->signal_handler_caller)
382
        return fi->frame;
383
      else
384
        {
385
          if (fi->saved_regs == NULL)
386
            or1k_init_saved_regs (fi);
387
          if (fi->saved_regs[regno])
388
            return read_memory_integer (ADDR_BITS_REMOVE (fi->saved_regs[regno]), OR1K_GPR_REGSIZE);
389
        }
390
    }
391
  return read_register (regno);
392
}
393
 
394
/* Find the caller of this frame.  We do this by seeing if LR_REGNUM
395
   is saved in the stack anywhere, otherwise we get it from the
396
   registers.  */
397
 
398
CORE_ADDR
399
or1k_frame_saved_pc (fi)
400
     struct frame_info *fi;
401
{
402
  CORE_ADDR saved_pc;
403
  /* We have to get the saved pc from the sigcontext
404
     if it is a signal handler frame.  */
405
  if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
406
    saved_pc = read_memory_integer (fi->frame, OR1K_GPR_REGSIZE);
407
  else
408
    saved_pc = read_next_frame_reg (fi, PC_REGNUM);
409
 
410
  return ADDR_BITS_REMOVE (saved_pc);
411
}
412
 
413
/* Discard from the stack the innermost frame, restoring all registers.  */
414
 
415
void
416
or1k_pop_frame ()
417
{
418
  register int regnum;
419
  struct frame_info *frame = get_current_frame ();
420
  CORE_ADDR new_sp = FRAME_FP (frame);
421
 
422
  write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
423
  if (frame->saved_regs == NULL)
424
    or1k_init_saved_regs (frame);
425
  for (regnum = 0; regnum < NUM_REGS; regnum++)    {
426
      if (regnum != SP_REGNUM && regnum != PC_REGNUM
427
          && frame->saved_regs[regnum] >= 0)
428
        write_register (regnum,
429
                        read_memory_integer (frame->saved_regs[regnum],
430
                                             OR1K_GPR_REGSIZE));
431
    }
432
  write_register (SP_REGNUM, new_sp);
433
  flush_cached_frames ();
434
}
435
 
436
CORE_ADDR
437
or1k_push_arguments (nargs, args, sp, struct_return, struct_addr)
438
     int nargs;
439
     value_ptr *args;
440
     CORE_ADDR sp;
441
     int struct_return;
442
     CORE_ADDR struct_addr;
443
{
444
  int argreg;
445
  int float_argreg;
446
  int argnum;
447
  int len = 0;
448
  int stack_offset = 0;
449
 
450
  /* Initialize the integer and float register pointers.  */
451
  argreg = A0_REGNUM;
452
  float_argreg = VFA0_REGNUM;
453
 
454
  /* The struct_return pointer occupies the RV value register.  */
455
  if (struct_return)
456
    write_register (RV_REGNUM, struct_addr);
457
 
458
  /* Now load as many as possible of the first arguments into
459
     registers, and push the rest onto the stack.  Loop thru args
460
     from first to last.  */
461
  for (argnum = 0; argnum < nargs; argnum++)
462
    {
463
      char *val;
464
      char valbuf[MAX_REGISTER_RAW_SIZE];
465
      value_ptr arg = args[argnum];
466
      struct type *arg_type = check_typedef (VALUE_TYPE (arg));
467
      int len = TYPE_LENGTH (arg_type);
468
      enum type_code typecode = TYPE_CODE (arg_type);
469
 
470
      /* The EABI passes structures that do not fit in a register by
471
         reference. In all other cases, pass the structure by value.  */
472
      if (len > OR1K_GPR_REGSIZE &&
473
          (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
474
        {
475
          store_address (valbuf, OR1K_GPR_REGSIZE, VALUE_ADDRESS (arg));
476
          typecode = TYPE_CODE_PTR;
477
          len = OR1K_GPR_REGSIZE;
478
          val = valbuf;
479
        }
480
      else
481
        {
482
          val = (char *) VALUE_CONTENTS (arg);
483
 
484
          if (typecode == TYPE_CODE_FLT
485
              /* Doubles are not stored in regs on 32b target.  */
486
              && len <= OR1K_VF_REGSIZE
487
              && OR1K_VF_PRESENT)
488
            {
489
              if (float_argreg <= OR1K_LAST_FP_ARG_REGNUM)
490
                {
491
                  CORE_ADDR regval = extract_address (val, len);
492
                  write_register (float_argreg++, regval);
493
                }
494
              else
495
                {
496
                  write_memory ((CORE_ADDR) sp, val, OR1K_VF_REGSIZE);
497
                  sp -= OR1K_STACK_ALIGN;
498
                }
499
            }
500
          else
501
            {
502
              if (argreg <= OR1K_LAST_ARG_REGNUM)
503
                {
504
                  CORE_ADDR regval = extract_address (val, len);
505
                  write_register (argreg++, regval);
506
                }
507
              else
508
                {
509
                  write_memory ((CORE_ADDR) sp, val, OR1K_GPR_REGSIZE);
510
                  sp -= OR1K_STACK_ALIGN;
511
                }
512
            }
513
        }
514
    }
515
 
516
  /* Return adjusted stack pointer.  */
517
  return sp;
518
}
519
 
520
/* Return nonzero when instruction has delay slot.  */
521
static int
522
is_delayed (insn)
523
     unsigned long insn;
524
{
525
  int i;
526
  for (i = 0; i < num_opcodes; ++i)
527
    if ((or32_opcodes[i].flags & OR32_IF_DELAY)
528
        && (or32_opcode_match (insn, or32_opcodes[i].encoding)))
529
      break;
530
  return (i < num_opcodes);
531
}
532
 
533
int
534
or1k_step_skips_delay (pc)
535
     CORE_ADDR pc;
536
{
537
  char buf[OR1K_INSTLEN];
538
 
539
  if (target_read_memory (pc, buf, OR1K_INSTLEN) != 0)
540
    /* If error reading memory, guess that it is not a delayed branch.  */
541
    return 0;
542
  return is_delayed ((unsigned long) extract_unsigned_integer (buf, OR1K_INSTLEN));
543
}
544
 
545
CORE_ADDR
546
or1k_push_return_address (pc, sp)
547
     CORE_ADDR pc;
548
     CORE_ADDR sp;
549
{
550
  /* Set the return address register to point to the entry
551
     point of the program, where a breakpoint lies in wait.  */
552
  write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ());
553
  return sp;
554
}
555
 
556
/* Root of all "set or1k "/"show or1k " commands. This will eventually be
557
   used for all OR1K-specific commands.  */
558
 
559
static void show_or1k_command PARAMS ((char *, int));
560
static void
561
show_or1k_command (args, from_tty)
562
     char *args;
563
     int from_tty;
564
{
565
  help_list (showor1kcmdlist, "show or1k ", all_commands, gdb_stdout);
566
}
567
 
568
static void set_or1k_command PARAMS ((char *, int));
569
static void
570
set_or1k_command (args, from_tty)
571
     char *args;
572
     int from_tty;
573
{
574
  printf_unfiltered ("\"set or1k\" must be followed by an appropriate subcommand.\n");
575
  help_list (setor1kcmdlist, "set or1k ", all_commands, gdb_stdout);
576
}
577
 
578
static char *
579
parse_spr_params (args, group, index)
580
                  char *args;
581
                  int *group, *index;
582
{
583
  *index = -1;
584
  if (args)
585
    {
586
      int i;
587
      char *ptr_c;
588
      /* Check if group number was supplied.  */
589
      ptr_c = args;
590
      while (*ptr_c != ' ' && *ptr_c != 0)
591
        ptr_c++;
592
      *ptr_c = 0;
593
 
594
      *group = (int) strtoul (args, &ptr_c, 0);
595
      if (*ptr_c != 0)
596
        {
597
          *group = OR1K_NUM_SPR_GROUPS;
598
          /* check for group name */
599
          for (i = 0; i < OR1K_NUM_SPR_GROUPS; i++)
600
            if (strcasecmp (or1k_group_names[i], args) == 0)
601
              {
602
                *group = i;
603
                break;
604
              }
605
          /* Invalid group => check all register names in all groups.  */
606
          if (*group >= OR1K_NUM_SPR_GROUPS)
607
            {
608
              for (i = 0; i < OR1K_NUM_SPR_GROUPS; i++)
609
                {
610
                  int regno;
611
                  regno = or1k_regno_from_name (i, args);
612
                  if (regno >= 0)
613
                    {
614
                      *group = i;
615
                      *index = regno;
616
                    }
617
                }
618
            }
619
        }
620
      if (*group < 0 || *group >= OR1K_NUM_SPR_GROUPS)
621
        error ("Invalid group or register.\n");
622
 
623
      if (*index < 0)
624
        {
625
          args += strlen(args) + 1;
626
          ptr_c = args;
627
          while (*ptr_c != ' ' && *ptr_c != 0)
628
            ptr_c++;
629
          *ptr_c = 0;
630
          *index = (int) strtoul (args, &ptr_c, 0);
631
          if (*ptr_c != 0)
632
            *index = or1k_regno_from_name (*group, args);
633
 
634
          if (*index < 0)
635
            {
636
              for (i = 0; i < or1k_spr_valid_aliases[*group]; i++)
637
                printf_unfiltered ("%s\t", or1k_internal_register_name (SPR_REG(*group, i)));
638
              printf_unfiltered ("\n");
639
              return args + strlen(args) + 1;
640
            }
641
        }
642
    }
643
  else
644
  /* No parameters - print groups */
645
    {
646
      int i;
647
      printf_unfiltered ("No parameter supplied. Valid groups are:\n");
648
      for (i = 0; i < OR1K_NUM_SPR_GROUPS; i++)
649
        printf_unfiltered ("%s\t", or1k_group_names[i]);
650
      printf_unfiltered ("\nSingle register name or register name or number after the group can be also supplied.\n");
651
    }
652
  return args + strlen(args) + 1;
653
}
654
 
655
/* SPR register info.  */
656
 
657
void
658
info_spr_cmd (char *args, int from_tty)
659
{
660
  int group, index;
661
  parse_spr_params (args, &group, &index);
662
  if (index >= 0)
663
    {
664
      printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
665
                         or1k_internal_register_name (SPR_REG(group, index)), group, index,
666
                         or1k_read_reg (SPR_REG(group, index)));
667
    }
668
}
669
 
670
/* Set SPR register.  */
671
 
672
void
673
spr_cmd (char *args, int from_tty)
674
{
675
  int group, index;
676
  char *nargs = parse_spr_params (args, &group, &index);
677
  /* Any arguments left?  */
678
  if (args + strlen(args) >= nargs)
679
    error ("Invalid register value.");
680
  if (index >= 0)
681
    {
682
      unsigned long prev;
683
      unsigned long value;
684
      char *ptr_c;
685
 
686
      prev = or1k_read_reg (SPR_REG(group, index));
687
 
688
      ptr_c = nargs;
689
      while (*ptr_c != ' ' && *ptr_c != 0)
690
        ptr_c++;
691
      *ptr_c = 0;
692
      value = strtoul (nargs, &ptr_c, 0);
693
      if (*ptr_c != 0)
694
        error ("Invalid register value.");
695
      printf_unfiltered ("%s.%s (SPR%i_%i) set to %i(%X), was:%i(%X)\n", or1k_group_names[group],
696
                         or1k_internal_register_name (SPR_REG(group, index)), group, index,
697
                         value, value, prev, prev);
698
    }
699
}
700
 
701
/* Calls extended command on target.  */
702
 
703
void
704
sim_command (char *args, int from_tty)
705
{
706
  or1k_sim_cmd (args, from_tty);
707
}
708
 
709
void
710
_initialize_or1k_tdep ()
711
{
712
  struct cmd_list_element *c;
713
  /* Add root prefix command for all "set or1k"/"show or1k" commands */
714
  add_prefix_cmd ("or1k", no_class, set_or1k_command,
715
                  "Various OR1K specific commands.",
716
                  &setor1kcmdlist, "set or1k ", 0, &setlist);
717
 
718
  add_prefix_cmd ("or1k", no_class, show_or1k_command,
719
                  "Various OR1K specific commands.",
720
                  &showor1kcmdlist, "show or1k ", 0, &showlist);
721
 
722
  /* Commands to show information about the sprs.  */
723
  add_cmd ("spr", class_info, info_spr_cmd,
724
           "Show information about the spr registers.",
725
           &infolist);
726
  c = add_cmd ("spr", class_support, spr_cmd,
727
                   "Set specified SPR register.",
728
                   &cmdlist);
729
  add_com ("sim", class_obscure, sim_command,
730
           "Send a extended command to the simulator.");
731
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.