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1 748 lampret 
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lLUD$E$ED$]ÍUWVS]u}D$@x$t$|$\$۹htE4$…tZ[^_]4$|$‰Z[^_]
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`뢐&UWV1Sh}t&t[u[^_]É'Ft{t%$exCD$CSHD$M빍v$qxCD$5롐v'U]]uu$\$t$D$wx\$t$$>uu]]]:UEE8uEЍE(UUSR[vvo]$Revision: 1.1.1.1 $qthelpdedmrunprpmpcresetbreakhiststatsstallinfordvset%sOpenRISC 1000 (OR32) Architectural Simulator, %s
132 
Copyright (C) 1999 Damjan Lampret, lampret@opencores.orgCopyright (C) 2000 Damjan Lampret, lampret@opencores.org                   Jimmy Chen-Min Chen, jimmy@ee.nctu.edu.tw                   Johan Rydberg, johan.rydberg@insight.se                   Marko Mlinar, markom@opencores.orgCopyright (C) 2001 Simon Srot, simons@opencores.orgVisit http://www.opencores.org for more information about OpenRISC 1000 and
133 
other open source cores.
134 
 
135 
This is free software, and you are welcome to redistribute it under certain
136 
conditions; for details see COPYING.q      - quit simulatorr      - display all registerst      - execute next instructionrun  []  - execute  instructions, no reg dump if hushpr       - patch register  with dm  [] - display memory from  to de  [] - debug insn memorypm    - patch memory location  with pc      - patch PC register with break      - toggle breakpoint at address reset      - simulator resethist       - execution historystall                    - stalls the processor and gives control to the debuggerstats     - execution statistics num or clear it.info       - configuration info (caches etc.)dv  [] [] - dumps memory as verilog (use redirect)dh  [] - dumps memory as hex code (use redirect) >    - redirect simulator stdout to  (and not emulated printf)set 
  =   - set configuration.  See sim.cfg for more information.debug      - toggles simulator debug modehelp       - available commands (this list)All devices connected
137 
 
138 
WARNING: dependstats stats must be enabled to do history analisis.
139 
 
140 
Problems loading boot code.
141 
Invalid memory configuration type.
142 
Seeding random generator with value %d
143 
OPENING SPRLOGwt+ERROR: Problems opening spr_log file.ERROR: Problems opening exe_log file.wb+ERROR: Problems opening memory profile file.
144 
+00000000 FFFFFFFF FFFFFFFF total
145 
ERROR: Problems opening profile file.
146 
-%08X FFFFFFFF
147 
(sim) w+debugstallinfo%s: Unknown command.
148 
/dev/fd/0WARNING: CPU stalled and gdb connection not enabled.clearCleared.hushsim.cfgWARNING: No config file read, assuming default configuration.
149 
Usage: %s [options]
150 
Options: -v                   version and copyright note -i                   enable interactive command prompt --nosrv              do not launch JTAG proxy server --srv             launch JTAG proxy server on port ; [random] -f or --file         load script file [sim.cfg] --profile <[c]|[q]>  enable profiling. c - cumulative, q - quiet --mprofile <[c]|[q]> enable memory profiling. c - cumulative, q - quiet --output-cfg         prints C structure of current configuration to standard outputstarting to dump mem...i=%x :: %08x %s
151 
label: %s |-f--file--nosrv--srv-i-v--profile--mprofile_d--mprofile_p--mprofile_a--mprofile_w-g--group--output-cfgUnknown option: %s
152 
Configure filename not specified!
153 
unexpected char '%c' (expecting '%c')
154 
WARNING: config.%s: %s
155 
ERROR: string too long.
156 
Verbose on, simdebug on, interactive prompt onMachine initialization...Clock cycle: %s
157 
Data cache present.Insn cache tag present.BPB simulation on.BTIC simulation on.BTIC simulation off.BPB simulation off.No instruction cache.No data cache.interactive prompt offsimdebug off, basemcuartdmamemorycpusimdebugVAPIethernettickimmudmmuicdcgpiobpbpmvgafbkbdinclude"%s"enabled=%ibaseaddr=0x%xPOCnuartsdevice%ienddeviceirq16550jitterrxfile="%s"txfilevapi_idndmasrandom_seedpatterntype=%s nmemoriescesizenamelogdelayrdelaywverrevuprsrhazardssuperscalardependstatsraw_rangesbuf_lenverboseprofileprof_fnmprofilemprof_fnhistoryexe_logexe_log_typeexe_log_startexe_log_endexe_log_markerexe_log_fnspr_logspr_log_fnclkcyclegdb_enabledserver_portlog_enabledhide_device_idvapi_log_fnnethernetsrx_channeltx_channelnsetsnwayspagesizeentrysizeustatesmissdelayhitdelayblocksizeload_missdelayload_hitdelaystore_missdelaystore_hitdelayngpiosbase_vapi_idbticsbp_bnf_fwdsbp_bf_fwdnvgasrefresh_ratefilenameERROR: config.%s:%s
158 
invalid time format.defaulthardwaresimplesoftwareinvalid execute log type '%s'.
159 
invalid number of devices.invalid device number.unknownrandomzeroinvalid memory type '%s'.
160 
 
161 
 
162 
/*%s: ERROR: Comment reached EOF.
163 
Invalid parameter: %s; ignoring.
164 
Reading script file from '%s'...
165 
WARNING: Cannot read script file from '%s',
166 
neither '%s'.
167 
s:%s
168 
sec:%s
169 
item:%s
170 
params:%s
171 
Invalid or missing section name.  One of valid sections must be specified:Invalid parameters specified.Invalid or missing item name.  One of valid items must be specified:/* This file was automatically generated by or1ksim,
172 
   using --output-cfg switch (cfg file '%s'). */
173 
 
174 
  tick:{enabled:%i},
175 
  nuarts:%i, uarts:{,%s
176 
    {rxfile:"%s", txfile:"%s", jitter:%i, baseaddr:0x%08x, irq:%i, vapi_id:0x%08x, uart16550:%i}},
177 
  ndmas:%i, dmas:{%s
178 
    {baseaddr:0x%08x, irq:%i, vapi_id:0x%08x}  nethernets:%i, ethernets:{%s
179 
    {baseaddr:0x%08x, dma:%i, tx_channel:0x%08x, rx_channel:0x%08x, rxfile:"%s", txfile:"%s", vapi_id:0x%08x}  ngpios:%i, gpios:{%s
180 
    {baseaddr:0x%08x, irq:%i, base_vapi_id:0x%08x}  mc:{enabled:%i, baseaddr:%i, POC:%i},
181 
MT_UNKNOWN  memory:{pattern:%i, random_seed:%i, type:%s, nmemories:%i, table:{MT_PATTERNMT_RANDOM%s
182 
 
183 
  immu:{enabled:%i, nways:%i, nsets:%i, pagesize:%i, entrysize:%i, ustates:%i, missdelay:%i, hitdelay:%i},
184 
 
185 
  ic:{enabled:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i, missdelay:%i, hitdelay:%i},
186 
  dc:{enabled:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i,
187 
    load_missdelay:%i, load_hitdelay:%i, store_missdelay:%i, store_hitdelay:%i},
188 
 
189 
  cpu:{upr:0x%08x, ver:0x%04x, rev:0x%04x, superscalar:%i, hazards:%i, dependstats:%i,
190 
 
191 
  sim:{debug:%i, verbose:%i, profile:%i, prof_fn:"%s", mprofile:%i, mprof_fn:"%s",
192 
    history:%i, exe_log:%i, exe_log_fn:"%s", clkcycle_ps:%i,
193 
    spr_log:%i, spr_log_fn:"%s"},
194 
  debug:{enabled:%i, gdb_enabled:%i, server_port:%i, vapi_id:0x%08x},
195 
  vapi:{enabled:%i, server_port:%i, log_enabled:%i, hide_device_id:%i, vapi_fn:"%s"},
196 
 
197 
};
198 
 
199 
Error reading line #%i
200 
 
201 
 
202 
 
203 
 
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Y@USAGE: mprofiler <-d|-p|-a|-w> [-f filename] [-g group] from to       -d      --detail                detailed output        -p      --pretty                pretty output    -a      --access                output accesses only   -w      --width                 output by width -f      --filename filename     specify mprofile file [sim.mprofile]        -g      --group bits            group 2^bits successive                                        addresses together [2]       -h      --help                  output this screen!!!!%i:%i   %08x %08x %08x %08x %i
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EXCEPTION: read out of memory (16-bit access to %.8lx)
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This COFF is not an executable.Not COFF, quiting.yy %sidentifyfile2xx %sidentifyfile1loadcode: filename %s  startaddr=%x  virtphy_transl=%xunknownexceptionarithshiftcomparebranchjumploadstoremovimmmoveextendnopmaccheck_depend
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stats 6: Store buffer analysisUsing store buffer of length %i.
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Number of total memory store cycles: %i/%i
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Number of cycles waiting for memory stores: %i
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Number of memory cycles spared: %i
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Store buffer analysis disabled. Enable it to see analysis results.Please specify a stats group (1-6).Hazard analysis disabled. Enable it to see analysis results.Y@H6g6
7X8v99
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Breakpoint at 0x%.8lx set.
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ABORT: read out of registers
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%i %08X
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Invalid operand type.
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 (executed) [time %s, #%i]
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(delay insn) (next insn) %sGPR%.2u: %.8lx  flag: %u
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  HAZARDWAIT: %u
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Superscalar CYCLES: %uStarting at 0x%08x
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fetch()
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%s: %.8lx %s
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             r%-2i=%08x EA =%08x :
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EXECUTED(): %.8lx:  %.2x%.2xGPR%2u: %.8lx  SR   : %.8lx  EPCR0: %.8lx  EEAR0: %.8lx  ESR0 : %.8lx
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--------------------- %8i instruction ---------------------
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l.bf relative: pc=%x pcnext=%x
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l.bnf relative: pc=%x pcnext=%x
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l.j relative: pc=%x pcnext=%x
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l.jal relative: pc=%x pcnext=%x
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+%08X %08X %08X %s
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+%08X %08X %08X @%08X
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-%08X %08X
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simprintf %x
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report(0x%x);
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WARNING: trying to write SPR while SR[SUPV] is cleared.Write to SPR  : [%08lX] <- [%08lX]
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parameter amax = %d;
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input [31:0] addr;

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