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/* Table of opcodes for the OpenRISC 1000 ISA.
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Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
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Contributed by Damjan Lampret (lampret@opencores.org).
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This file is part of or1k_gen_isa, or1ksim, GDB and GAS.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* We treat all letters the same in encode/decode routines so
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we need to assign some characteristics to them like signess etc.*/
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#ifndef OR32_H_ISA
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#define OR32_H_ISA
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#define NUM_UNSIGNED (0)
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#define NUM_SIGNED (1)
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#ifndef PARAMS
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#define PARAMS(x) x
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#endif
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#ifndef CONST
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#define CONST const
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#endif
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#define MAX_GPRS 32
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#define PAGE_SIZE 4096
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#undef __HALF_WORD_INSN__
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#define OPERAND_DELIM (',')
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#define OR32_IF_DELAY (1)
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#define OR32_W_FLAG (2)
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#define OR32_R_FLAG (4)
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struct or32_letter {
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char letter;
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int sign;
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/* int reloc; relocation per letter ??*/
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};
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/* Main instruction specification array. */
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struct or32_opcode {
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/* Name of the instruction. */
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char *name;
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/* A string of characters which describe the operands.
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Valid characters are:
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,() Itself. Characters appears in the assembly code.
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rA Register operand.
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rB Register operand.
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rD Register operand.
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I An immediate operand, range -32768 to 32767.
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J An immediate operand, range . (unused)
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K An immediate operand, range 0 to 65535.
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L An immediate operand, range 0 to 63.
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M An immediate operand, range . (unused)
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N An immediate operand, range -33554432 to 33554431.
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O An immediate operand, range . (unused) */
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char *args;
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/* Opcode and operand encoding. */
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char *encoding;
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void (*exec)();
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unsigned int flags;
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};
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#define OPTYPE_LAST (0x80000000)
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#define OPTYPE_OP (0x40000000)
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#define OPTYPE_REG (0x20000000)
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#define OPTYPE_SIG (0x10000000)
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#define OPTYPE_DIS (0x08000000)
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#define OPTYPE_DST (0x04000000)
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#define OPTYPE_SBIT (0x00001F00)
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#define OPTYPE_SHR (0x0000001F)
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#define OPTYPE_SBIT_SHR (8)
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/* MM: Data how to decode operands. */
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extern struct insn_op_struct {
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unsigned long type;
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unsigned long data;
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} **op_start;
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#ifdef HAS_EXECUTION
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extern void l_invalid PARAMS((void));
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extern void l_sfne PARAMS((void));
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extern void l_bf PARAMS((void));
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extern void l_add PARAMS((void));
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extern void l_sw PARAMS((void));
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extern void l_sb PARAMS((void));
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extern void l_sh PARAMS((void));
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extern void l_lwz PARAMS((void));
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extern void l_lbs PARAMS((void));
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extern void l_lbz PARAMS((void));
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extern void l_lhs PARAMS((void));
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extern void l_lhz PARAMS((void));
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extern void l_movhi PARAMS((void));
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extern void l_and PARAMS((void));
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extern void l_or PARAMS((void));
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extern void l_xor PARAMS((void));
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extern void l_sub PARAMS((void));
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extern void l_mul PARAMS((void));
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extern void l_div PARAMS((void));
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extern void l_divu PARAMS((void));
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extern void l_sll PARAMS((void));
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extern void l_sra PARAMS((void));
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extern void l_srl PARAMS((void));
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extern void l_j PARAMS((void));
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extern void l_jal PARAMS((void));
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extern void l_jalr PARAMS((void));
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extern void l_jr PARAMS((void));
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extern void l_rfe PARAMS((void));
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extern void l_nop PARAMS((void));
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extern void l_bnf PARAMS((void));
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extern void l_sfeq PARAMS((void));
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extern void l_sfgts PARAMS((void));
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extern void l_sfges PARAMS((void));
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extern void l_sflts PARAMS((void));
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extern void l_sfles PARAMS((void));
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extern void l_sfgtu PARAMS((void));
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extern void l_sfgeu PARAMS((void));
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extern void l_sfltu PARAMS((void));
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extern void l_sfleu PARAMS((void));
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extern void l_mtspr PARAMS((void));
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extern void l_mfspr PARAMS((void));
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extern void l_sys PARAMS((void));
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extern void l_trap PARAMS((void)); /* CZ 21/06/01 */
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extern void l_macrc PARAMS((void));
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extern void l_mac PARAMS((void));
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extern void l_msb PARAMS((void));
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extern void l_invalid PARAMS((void));
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extern void l_cust1 PARAMS ((void));
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extern void l_cust2 PARAMS ((void));
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extern void l_cust3 PARAMS ((void));
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extern void l_cust4 PARAMS ((void));
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#endif
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extern void l_none PARAMS((void));
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extern CONST struct or32_letter or32_letters[];
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extern CONST struct or32_opcode or32_opcodes[];
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extern CONST int num_opcodes;
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/* Calculates instruction length in bytes. Always 4 for OR32. */
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extern int insn_len PARAMS((int insn_index));
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/* Is individual insn's operand signed or unsigned? */
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extern int letter_signed PARAMS((char l));
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/* Number of letters in the individual lettered operand. */
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extern int letter_range PARAMS((char l));
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/* MM: Returns index of given instruction name. */
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extern int insn_index PARAMS((char *insn));
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/* MM: Returns instruction name from index. */
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extern CONST char *insn_name PARAMS ((int index));
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/* MM: Constructs new FSM, based on or32_opcodes. */
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extern void build_automata PARAMS ((void));
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/* MM: Destructs FSM. */
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extern void destruct_automata PARAMS ((void));
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/* MM: Decodes instruction using FSM. Call build_automata first. */
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extern int insn_decode PARAMS((unsigned int insn));
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/* Disassemble one instruction from insn to disassemble.
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Return the size of the instruction. */
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int disassemble_insn (unsigned long insn);
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#endif
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