OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [Makefile.am] - Blame information for rev 1771

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 7 jrydberg
#
2
#
3
#
4
#
5
#
6
 
7 1350 nogj
SUBDIRS = cpu bpb support cache mmu peripheral tick pm pic debug vapi cuc port
8 7 jrydberg
 
9 241 markom
bin_PROGRAMS = sim
10 7 jrydberg
 
11 879 markom
sim_SOURCES     = toplevel.c sim-config.c sim-config.h profiler.c \
12 1353 nogj
        mprofiler.c profiler.h mprofiler.h sim-cmd.c
13 30 lampret
sim_LDADD       = cpu/common/libcommon.a cpu/$(CPU_ARCH)/libarch.a \
14
        cpu/or1k/libor1k.a support/libsupport.a mmu/libmmu.a \
15 92 lampret
        bpb/libbpb.a cache/libcache.a peripheral/libperipheral.a \
16 1075 rprescott
        peripheral/channels/libchannels.a \
17 306 markom
        tick/libtick.a pm/libpm.a pic/libpic.a debug/libdebug.a \
18 1350 nogj
        vapi/libvapi.a cuc/libcuc.a port/libport.a
19 879 markom
 
20 1242 hpanther
sim_LDFLAGS     = -lm #-lreadline

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.