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rherveille |
/*
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atadevice_cmdi.h -- ATA Device command interpreter
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Copyright (C) 2002 Richard Herveille, rherveille@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/**********************************************************************/
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/* define FIRMWARE revision; current revision of OR1Ksim ATA code. */
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/* coded using the release date (yyyymmdd, but shuffled) */
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rherveille |
#define FIRMWARE "02207031"
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876 |
rherveille |
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/**********************************************************************/
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/* Define default CHS translation parameters */
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/* bytes per sector */
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#define BYTES_PER_SECTOR 512
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/* number of default heads ( -1) */
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#define HEADS 7
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/* number of default sectors per track */
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#define SECTORS 32
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/**********************************************************************/
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/* Define supported DMA and PIO modes */
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/* define the highest Multiword DMA mode; 2, 1, 0, -1(no DMA) */
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#define MWDMA 2
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/* define the highest supported PIO mode; 4, 3, 2, 1, 0(obsolete) */
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#define PIO 4
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/**********************************************************************/
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/* Define DMA and PIO cycle times */
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/* define the minimum Multiword DMA cycle time per word (in nsec) */
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#define MIN_MWDMA_CYCLE_TIME 100
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/* define the manufacturer's recommended Multiword DMA cycle time */
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#define RECOMMENDED_MWDMA_CYCLE_TIME 100
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/* define the minimum PIO cycle time per word (in nsec), no IORDY */
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#define MIN_PIO_CYCLE_TIME_NO_IORDY 100
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/* define the minimum PIO cycle time per word (in nsec), with IORDY */
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#define MIN_PIO_CYCLE_TIME_IORDY 100
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/**********************************************************************/
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/* Define supported command sets */
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/* 1=command is supported */
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/* 0=command is not (yet) supported */
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#define SUPPORT_NOP_CMD 0
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#define SUPPORT_READ_BUFFER_CMD 0
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#define SUPPORT_WRITE_BUFFER_CMD 0
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#define SUPPORT_HOST_PROTECTED_AREA 0
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#define SUPPORT_DEVICE_RESET_CMD 1
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#define SUPPORT_SERVICE_INTERRUPT 0
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#define SUPPORT_RELEASE_INTERRUPT 0
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#define SUPPORT_LOOKAHEAD 0
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#define SUPPORT_WRITE_CACHE 0
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#define SUPPORT_POWER_MANAGEMENT 0
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#define SUPPORT_REMOVABLE_MEDIA 0
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#define SUPPORT_SECURITY_MODE 0
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#define SUPPORT_SMART 0
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#define SUPPORT_SET_MAX 0
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#define SET_FEATURES_REQUIRED_AFTER_POWER_UP 0
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#define SUPPORT_POWER_UP_IN_STANDBY_MODE 0
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#define SUPPORT_REMOVABLE_MEDIA_NOTIFICATION 0
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#define SUPPORT_APM 0
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#define SUPPORT_CFA 0
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#define SUPPORT_READ_WRITE_DMA_QUEUED 0
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#define SUPPORT_DOWNLOAD_MICROCODE 0
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/*
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Queue depth defines the maximum queue depth supported by the device.
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This includes all commands for which the command acceptance has occured
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and command completion has not occured. This value is used for the DMA
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READ/WRITE QUEUE command.
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QUEUE_DEPTH = actual_queue_depth -1
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*/
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#define QUEUE_DEPTH 0
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/**********************************************************************/
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/* Internal defines */
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#define PACKET_SIGNATURE 1
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/*
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----------------
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-- Prototypes --
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----------------
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*/
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int ata_device_execute_cmd(ata_device *device);
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void ata_device_reset_cmd(ata_device *device);
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void ata_execute_device_diagnostics_cmd(ata_device *device);
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void ata_identify_device_cmd(ata_device *device);
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void ata_initialize_device_parameters_cmd(ata_device *device);
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void ata_read_sectors_cmd(ata_device *device);
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