OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [peripheral/] [gpio.c] - Blame information for rev 1771

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 444 erez
/* gpio.h -- GPIO code simulation
2
   Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
3
 
4
   This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 2 of the License, or
9
   (at your option) any later version.
10
 
11
   This program is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
*/
20 1308 phoenix
#include <string.h>
21 444 erez
 
22 1350 nogj
#include "config.h"
23
 
24
#ifdef HAVE_INTTYPES_H
25
#include <inttypes.h>
26
#endif
27
 
28
#include "port.h"
29
#include "arch.h"
30 1308 phoenix
#include "abstract.h"
31 444 erez
#include "gpio.h"
32
#include "gpio_i.h"
33
#include "sim-config.h"
34
#include "pic.h"
35
#include "vapi.h"
36 1308 phoenix
#include "debug.h"
37 444 erez
 
38
static struct gpio_device gpios[MAX_GPIOS];
39
 
40
static void gpio_vapi_read( unsigned long id, unsigned long data );
41 1350 nogj
static uint32_t gpio_read32( oraddr_t addr );
42
static void gpio_write32( oraddr_t addr, uint32_t value );
43 444 erez
 
44
static void gpio_external_clock( unsigned long value );
45
static void gpio_device_clock( struct gpio_device *gpio );
46 1350 nogj
static int gpio_find_device( oraddr_t addr, struct gpio_device **gpio, oraddr_t *reladdr );
47 444 erez
static struct gpio_device *gpio_find_vapi_device( unsigned long id, unsigned *which_vapi );
48
 
49
/* Initialize all parameters and state */
50
void gpio_reset( void )
51
{
52
  static int first_time = 1;
53 1308 phoenix
  unsigned i;
54 444 erez
 
55
  if ( first_time ) {
56
    memset( gpios, 0, sizeof(gpios) );
57
    first_time = 0;
58
  }
59 549 markom
 
60 477 erez
  for ( i = 0; i < config.ngpios; ++ i ) {
61 444 erez
    struct gpio_device *gpio = &(gpios[i]);
62
 
63
    gpio->gpio_number = i;
64
    gpio->baseaddr = config.gpios[i].baseaddr;
65
 
66
    if ( gpio->baseaddr != 0 ) {
67
      /* Get IRQ */
68
      gpio->irq = config.gpios[i].irq;
69
 
70
      /* Register memory range */
71 970 simons
      register_memoryarea( gpio->baseaddr, GPIO_ADDR_SPACE, 4, 0, gpio_read32, gpio_write32 );
72 444 erez
 
73
      /* Possibly connect to VAPI */
74 477 erez
      if ( config.gpios[i].base_vapi_id ) {
75
        gpio->base_vapi_id = config.gpios[i].base_vapi_id;
76
        vapi_install_multi_handler( gpio->base_vapi_id, GPIO_NUM_VAPI_IDS, gpio_vapi_read );
77
      }
78 444 erez
    }
79
  }
80
}
81
 
82
 
83
/* Dump status */
84
void gpio_status( void )
85
{
86
  unsigned i;
87
 
88 477 erez
  for ( i = 0; i < config.ngpios; ++ i ) {
89 444 erez
    struct gpio_device *gpio = &(gpios[i]);
90
 
91
    if ( gpio->baseaddr == 0 )
92
      continue;
93
 
94 1350 nogj
    PRINTF( "\nGPIO %u at 0x%"PRIxADDR":\n", i, gpio->baseaddr );
95 997 markom
    PRINTF( "RGPIO_IN     : 0x%08lX\n", gpio->curr.in );
96
    PRINTF( "RGPIO_OUT    : 0x%08lX\n", gpio->curr.out );
97
    PRINTF( "RGPIO_OE     : 0x%08lX\n", gpio->curr.oe );
98
    PRINTF( "RGPIO_INTE   : 0x%08lX\n", gpio->curr.inte );
99
    PRINTF( "RGPIO_PTRIG  : 0x%08lX\n", gpio->curr.ptrig );
100
    PRINTF( "RGPIO_AUX    : 0x%08lX\n", gpio->curr.aux );
101
    PRINTF( "RGPIO_CTRL   : 0x%08lX\n", gpio->curr.ctrl );
102
    PRINTF( "RGPIO_INTS   : 0x%08lX\n", gpio->curr.ints );
103 444 erez
  }
104
}
105
 
106
 
107
/* Convert a memory address to a device struct and relative address.
108
 * Return nonzero on success */
109 1350 nogj
int gpio_find_device( oraddr_t addr, struct gpio_device **gpio, oraddr_t *reladdr )
110 444 erez
{
111
  unsigned i;
112
  *gpio = NULL;
113
 
114 477 erez
  for ( i = 0; i < config.ngpios && *gpio == NULL; ++ i ) {
115 444 erez
    if ( (addr >= gpios[i].baseaddr) && (addr < gpios[i].baseaddr + GPIO_ADDR_SPACE) )
116
      *gpio = &(gpios[i]);
117
  }
118
 
119
  /* verify we found a device */
120
  if ( *gpio == NULL )
121
    return 0;
122
 
123
  /* Verify legal address */
124
  if ( (addr - (*gpio)->baseaddr) % 4 != 0 )
125
    return 0;
126
 
127
  *reladdr = addr - (*gpio)->baseaddr;
128
  return 1;
129
}
130
 
131
 
132
/* Find device by vapi id */
133
struct gpio_device *gpio_find_vapi_device( unsigned long id, unsigned *which )
134
{
135 1308 phoenix
  unsigned i;
136 444 erez
 
137 477 erez
  for ( i = 0; i < config.ngpios; ++ i )
138
    if ( (id >= gpios[i].base_vapi_id) && (id < gpios[i].base_vapi_id + GPIO_NUM_VAPI_IDS) ) {
139
      *which = id - gpios[i].base_vapi_id;
140
      return &(gpios[i]);
141
    }
142 444 erez
 
143
  return NULL;
144
}
145
 
146
 
147
/* Wishbone read */
148 1350 nogj
uint32_t gpio_read32( oraddr_t addr )
149 444 erez
{
150
  struct gpio_device *gpio;
151
  if ( !gpio_find_device( addr, &gpio, &addr ) )        {
152 1350 nogj
    debug( 2, "gpio_read32( 0x%"PRIxADDR" ): Not in registered range(s)\n", addr );
153 444 erez
    return 0;
154
  }
155
 
156
  switch( addr ) {
157 502 erez
  case RGPIO_IN: return gpio->curr.in | gpio->curr.out;
158 444 erez
  case RGPIO_OUT: return gpio->curr.out;
159
  case RGPIO_OE: return gpio->curr.oe;
160
  case RGPIO_INTE: return gpio->curr.inte;
161
  case RGPIO_PTRIG: return gpio->curr.ptrig;
162
  case RGPIO_AUX: return gpio->curr.aux;
163
  case RGPIO_CTRL: return gpio->curr.ctrl;
164 502 erez
  case RGPIO_INTS: return gpio->curr.ints;
165 444 erez
  }
166
}
167
 
168
 
169
/* Wishbone write */
170 1350 nogj
void gpio_write32( oraddr_t addr, uint32_t value )
171 444 erez
{
172
  struct gpio_device *gpio;
173
  if ( !gpio_find_device( addr, &gpio, &addr ) )        {
174 1350 nogj
    debug( 2, "gpio_write32( 0x%"PRIxADDR" ): Not in registered range(s)\n", addr );
175 444 erez
    return;
176
  }
177
 
178
  switch( addr ) {
179 483 erez
  case RGPIO_IN: debug( 5, "GPIO: Cannot write to RGPIO_IN\n" ); break;
180 444 erez
  case RGPIO_OUT: gpio->next.out = value; break;
181
  case RGPIO_OE: gpio->next.oe = value; break;
182
  case RGPIO_INTE: gpio->next.inte = value; break;
183
  case RGPIO_PTRIG: gpio->next.ptrig = value; break;
184
  case RGPIO_AUX: gpio->next.aux = value; break;
185
  case RGPIO_CTRL: gpio->next.ctrl = value; break;
186 502 erez
  case RGPIO_INTS: gpio->next.ints = value; break;
187 444 erez
  }
188
}
189
 
190
 
191
/* Input from "outside world" */
192
void gpio_vapi_read( unsigned long id, unsigned long data )
193
{
194
  unsigned which;
195
  struct gpio_device *gpio = gpio_find_vapi_device( id, &which );
196
 
197 1350 nogj
  debug( 5, "GPIO: id %08lx, data %08lx\n", id, data );
198 444 erez
 
199
  if ( !gpio ) {
200 1350 nogj
    debug( 1, "GPIO: VAPI ID %08lx is not ours!\n", id );
201 444 erez
    return;
202
  }
203
 
204
  switch( which ) {
205 477 erez
  case GPIO_VAPI_DATA:
206 1350 nogj
    debug( 4, "GPIO: Next input from VAPI = 0x%08lx (RGPIO_OE = 0x%08lx)\n",
207
           data, gpio->next.oe );
208 477 erez
    gpio->next.in = data;
209
    break;
210
  case GPIO_VAPI_AUX:
211
    gpio->auxiliary_inputs = data;
212
    break;
213
  case GPIO_VAPI_RGPIO_OE:
214
    gpio->next.oe = data;
215
    break;
216
  case GPIO_VAPI_RGPIO_INTE:
217
    gpio->next.inte = data;
218
    break;
219
  case GPIO_VAPI_RGPIO_PTRIG:
220
    gpio->next.ptrig = data;
221
    break;
222
  case GPIO_VAPI_RGPIO_AUX:
223
    gpio->next.aux = data;
224
    break;
225
  case GPIO_VAPI_RGPIO_CTRL:
226
    gpio->next.ctrl = data;
227
    break;
228
  case GPIO_VAPI_CLOCK:
229
    gpio_external_clock( data );
230
    break;
231 444 erez
  }
232
}
233
 
234
/* System Clock. */
235
void gpio_clock( void )
236
{
237
  unsigned i;
238
 
239 477 erez
  for ( i = 0; i < config.ngpios; ++ i )
240 444 erez
    if ( !(gpios[i].curr.ctrl & RGPIO_CTRL_ECLK) )
241
      gpio_device_clock( &(gpios[i]) );
242
}
243
 
244
/* External Clock. */
245
void gpio_external_clock( unsigned long value )
246
{
247
  unsigned i;
248
 
249 477 erez
  /* "Normalize" clock value */
250 444 erez
  value = (value != 0);
251
 
252 477 erez
  for ( i = 0; i < config.ngpios; ++ i ) {
253 444 erez
    struct gpio_device *gpio = &(gpios[i]);
254
 
255 477 erez
    int use_external_clock = ((gpio->curr.ctrl & RGPIO_CTRL_ECLK) == RGPIO_CTRL_ECLK);
256
    int negative_edge = ((gpio->curr.ctrl & RGPIO_CTRL_NEC) == RGPIO_CTRL_NEC);
257 444 erez
 
258
    gpio->next.external_clock = value;
259
 
260 477 erez
    if ( use_external_clock && (gpio->next.external_clock != gpio->curr.external_clock) && (value != negative_edge) )
261 444 erez
      gpio_device_clock( gpio );
262
  }
263
}
264
 
265 477 erez
 
266 444 erez
/* Clock as handld by one device. */
267
void gpio_device_clock( struct gpio_device *gpio )
268
{
269 445 erez
  /* Calculate new inputs and outputs */
270
  gpio->next.in &= ~gpio->next.oe; /* Only input bits */
271
  /* Replace requested output bits with aux input */
272
  gpio->next.out = (gpio->next.out & ~gpio->next.aux) | (gpio->auxiliary_inputs & gpio->next.aux);
273
  gpio->next.out &= gpio->next.oe; /* Only output-enabled bits */
274
 
275 444 erez
  /* If any outputs changed, notify the world (i.e. vapi) */
276 477 erez
  if ( gpio->next.out != gpio->curr.out ) {
277 1350 nogj
    debug( 4, "GPIO: New output 0x%08lx, RGPIO_OE = 0x%08lx\n", gpio->next.out,
278
           gpio->next.oe );
279 477 erez
    if ( gpio->base_vapi_id )
280
      vapi_send( gpio->base_vapi_id + GPIO_VAPI_DATA, gpio->next.out );
281
  }
282 444 erez
 
283 445 erez
  /* If any inputs changed and interrupt enabled, generate interrupt */
284 477 erez
  if ( gpio->next.in != gpio->curr.in ) {
285 1350 nogj
    debug( 4, "GPIO: New input 0x%08lx\n", gpio->next.in );
286 477 erez
 
287
    if ( gpio->next.ctrl & RGPIO_CTRL_INTE ) {
288
      unsigned changed_bits = gpio->next.in ^ gpio->curr.in; /* inputs that have changed */
289
      unsigned set_bits = changed_bits & gpio->next.in; /* inputs that have been set */
290
      unsigned cleared_bits = changed_bits & gpio->curr.in; /* inputs that have been cleared */
291
      unsigned relevant_bits = (gpio->next.ptrig & set_bits) | (~gpio->next.ptrig & cleared_bits);
292
 
293
      if ( relevant_bits & gpio->next.inte ) {
294 499 erez
        debug( 3, "GPIO: Reporting interrupt %d\n", gpio->irq );
295 477 erez
        report_interrupt( gpio->irq );
296 502 erez
        gpio->next.ctrl |= RGPIO_CTRL_INTS;
297
        gpio->next.ints |= relevant_bits & gpio->next.inte;
298 477 erez
      }
299 444 erez
    }
300
  }
301
 
302
  /* Switch to values for next clock */
303
  memcpy( &(gpio->curr), &(gpio->next), sizeof(gpio->curr) );
304
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.