OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [tick/] [tick.c] - Blame information for rev 332

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 91 lampret
/* tick.c -- Simulation of OpenRISC 1000 tick timer
2
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
3
 
4
This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
This program is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 2 of the License, or
9
(at your option) any later version.
10
 
11
This program is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with this program; if not, write to the Free Software
18
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
 
20
/* This is functional simulation of OpenRISC 1000 architectural
21
   tick timer.
22
*/
23
 
24
#include <stdlib.h>
25
#include <stdio.h>
26
#include <string.h>
27
 
28
#include "tick.h"
29
#include "../cpu/or1k/spr_defs.h"
30 102 lampret
#include "pic.h"
31 189 chris
#include "sprs.h"
32 91 lampret
 
33 133 markom
/* For mode 10 only: timer stops until we write into TTCR.  */
34
int tt_stopped = 0;
35
 
36 91 lampret
/* Reset. It initializes TTCR register. */
37
void tick_reset()
38
{
39 332 markom
  if (config.tick.enabled) {
40
    if (config.sim.verbose)
41
      printf("Resetting Tick Timer.\n");
42
    mtspr(SPR_TTCR, 0);
43
    mtspr(SPR_TTMR, 0);
44
    tt_stopped = 0;
45
  } else
46
    tt_stopped = 1;
47 91 lampret
}
48
 
49
/* Simulation hook. Must be called every clock cycle to simulate tick
50
   timer. It does internal functional tick timer simulation. */
51 332 markom
inline void tick_clock()
52 91 lampret
{
53 133 markom
  unsigned long ttcr;
54
  unsigned long ttmr;
55 332 markom
 
56
  if (tt_stopped)
57
    return;
58
 
59 133 markom
  ttcr = mfspr(SPR_TTCR);
60
  ttmr = mfspr(SPR_TTMR);
61
 
62 332 markom
  if (!(ttmr & SPR_TTMR_M))
63 133 markom
    return;
64
 
65
  if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) {
66 189 chris
    int mode = (ttmr & SPR_TTMR_M) >> 30; /* CZ 04/09/01 */
67
 
68 133 markom
    if (ttmr & SPR_TTMR_IE) {
69
      setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
70
      report_interrupt(INT_TICK);
71
    }
72 189 chris
 
73
    /* Handle the modes properly.. CZ 04/09/01 */
74
    switch(mode)
75
      {
76
      case 0:    /* Timer is disabled */
77
        tt_stopped = 1;
78
        break;
79
      case 1:    /* Timer should auto restart */
80
        ttcr = 0;
81
        mtspr(SPR_TTCR,ttcr);
82
        break;
83
      case 2:    /* Pause the timer */
84
        tt_stopped = 1;
85
        break;
86
      case 3:    /* Timer keeps running */
87
        break;
88
      }
89 133 markom
  }
90
  if (!tt_stopped)
91
    ttcr++;
92
  mtspr(SPR_TTCR, ttcr);
93 91 lampret
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.