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1 147 chris
Originally by Chris Ziomkowski 
2 1242 hpanther
Some Additions by Heiko Panther 
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4 147 chris
Brief introduction to using GDB based debugging with or1ksim
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GDB uses the JTAG proxy server included in or1ksim to communicate
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directly with the simulator. Only 1 connection is allowed to the
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proxy server at a time. Attempting a second connection will terminate
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the previous connection. This is very useful when the gdb or1k
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process terminates abnormally (such as when you are debugging the
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debugger.) In this case it is impossible to notify the JTAG server
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that the socket has shut down, and therefore it will assume that a
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new connection implies the termination of the previous process.
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The or1ksim will start the JTAG proxy server on the port specified
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for service "jtag". If such a service is not specified, the server
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will choose a random port number. This behavior can be overridden by
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specifying the port number to the simulator using the -srv option.
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As an example, "sim -srv 9999" starts up the simulator with the
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JTAG proxy server on port 9999. This behavior is useful for those
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people who do not have root access and can not add services to
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the config files (such as university students operating in a shared
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environment.)
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As the JTAG proxy server runs only if there is data available for
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reading, there is very little resource usage consumed by this
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capability. However, in certain instances where gdb is not being
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utilized, it is possible to disable the JTAG proxy server
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entirely.  This will recover the few cycles necessary for the
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poll() system call. (Tests indicate this has a negligible to
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non existant impact on speed, however your mileage may vary.)
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This behavior can be achieved by starting the simulator with
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the command "sim -nosrv."
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At startup, the simulator will execute random commands, just as
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a real chip would do performing in this environment if the memory
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was not initialized. If it is desired to simulate a ROM or FLASH
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environment, these can be approximated by using the -loadmem option
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to the simulator. For example, to simulate a 32k flash at location
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0x8000, the command "sim -loadmem@0x8000 " could be
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used, where  represents the name of the initialization
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file. If the optional '@0x8000' flag is left off of the loadmem
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statement, then the load will occur at location 0. Several loadmem
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flags can appear on the command line to simulate different
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memory blocks.
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It is also possible to initialize all RAM to a predefined value,
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which is usually 0x00000000 or 0xFFFFFFFF. This would be equivalent
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to what is normally observed in a real world environment. However,
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specific sequences are possible in case this is necessary. Alternatively,
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random values can be assigned to memory, to check the behavior of a
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process under different conditions. All of these options can be
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handled by the "-initmem" option of the simulator. The following
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command would startup the simulator with all memory initialized to
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"1":
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sim -initmem 0xFFFFFFFF
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while this command would generate random values:
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sim -initmem random
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Once the simulator is started, it will print out something like
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the following:
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> bash-2.03$ sim
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> JTAG Proxy server started on port 42240
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> Machine initialization...
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> Data cache tag: physical
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> Insn cache tag: physical
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> BPB simulation on.
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> BTIC simulation on.
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> Clock cycle: 4 ns
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> RAM: 0x0 to 0x7aa80 (490 KB)
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>
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> simdebug off, interactive prompt off
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> Building automata... done, num uncovered: 0/216.
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> Parsing operands data... done.
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> Resetting 4 UART(s).
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> UART0 has problems with RX file stream.
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> Resetting Tick Timer.
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> Resetting Power Management.
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> Resetting PIC.
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> Exception 0x100 (Reset): Iqueue[0].insn_addr: 0x0  Eff ADDR: 0x0
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>  pc: 0x0  pcnext: 0x4
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>
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Note that because we did not specify a server port, a random
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port (42240) was selected for us (The "jtag" service does not
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exist on this machine). We will need this value to create the
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connection URL for the target command. It is now possible to
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debug a program with gdb as follows:
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> bash-2.03$ gdb
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> GNU gdb 5.0
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> Copyright 2000 Free Software Foundation, Inc.
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> GDB is free software, covered by the GNU General Public License, and you are
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> welcome to change it and/or distribute copies of it under certain conditions.
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> Type "show copying" to see the conditions.
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> There is absolutely no warranty for GDB.  Type "show warranty" for details.
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> This GDB was configured as "--host=sparc-sun-solaris2.7 --target=or32-rtems".
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> (or1k) file "dhry.or32"
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> Reading symbols from dhry.or32...done.
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> (or1k) target jtag jtag://localhost:42240
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> Remote or1k debugging using jtag://localhost:42240
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> 0x0 in ?? ()
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> (or1k) load dhry.or32
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> Loading section .text, size 0x14fc lma 0x100
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> Loading section .data, size 0x2804 lma 0x15fc
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> Start address 0x100 , load size 15616
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> Transfer rate: 124928 bits/sec, 488 bytes/write.
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> (or1k) b main
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> Breakpoint 1 at 0x51c: file dhry.c, line 176.
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> (or1k) run
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> Starting program: /usr3/home/chris/opencores/or1k/gdb-build/gdb/dhry.or32
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>
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> Breakpoint 1, main () at dhry.c:176
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> 176       Next_Ptr_Glob = (Rec_Pointer) &x;
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> (or1k)
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The simulator window will have printed out the following, showing that
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a breakpoint exception was asserted.
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> Exception 0xd00 (Break): Iqueue[0].insn_addr: 0x51c  Eff ADDR: 0x0
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> pc: 0x51c  pcnext: 0x520
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Note that when the "run" command is given, the simulator will start
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by jumping to the reset vector at location 0x100. You must start off
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by placing a small bootloader at this location. A simple environment
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capable of running C programs can be established by placing the
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following code in a file called "start.s" and linking it to your
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executable. As an example, the following will work. The file start.s
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was derived from the output of a file start.c compiled by gcc:
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or32-rtems-gcc -g -c -o start.o start.s
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or32-rtems-gcc -g -c -DOR1K -o dhry.o dhry.c
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or32-rtems-ld -Ttext 0x0 -o dhry.or32 start.o dhry.o
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---------------------- CUT HERE -------------------------
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# file start.s
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.file   "start.s"
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# This is the general purpose start routine. It
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# sets up the stack register, and jumps to the
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# _main program location. It should be linked at
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# the start of all programs.
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.text
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        .align  4
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        .org    0x100                   # The reset routine goes at 0x100
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.proc _rst
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        .def    _rst
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        .val    _rst
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        .scl    2
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        .type   041
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        .endef
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        .global _rst
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_rst:
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        .def    .bf
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        .val    .
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        .scl    101
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        .endef
164 154 chris
        l.addi          r1,r0,0x7f00    # Set STACK to value 0x7f00
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        l.addi          r2,r1,0x0       # FRAME and STACK are the same
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        l.mfspr         r3,r0,17        # Get SR value
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        l.ori           r3,r3,2         # Set exception enable bit
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        l.jal           _main           # Jump to main routine
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        l.mtspr         r0,r3,17        # Enable exceptions (DELAY SLOT)
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.endproc _rst
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        .def    _rst
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        .val    .
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        .scl    -1
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        .endef
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177 154 chris
        .org    0xFFC
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        l.nop                           # Guarantee the exception vector space
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                                        # does not have general purpose code
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# C code starts at 0x1000
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183 1242 hpanther
---------------------- CUT HERE -------------------------
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Setting registers
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"info spr" commands give info about special purpose registers, "spr" commands set them.
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"info spr" - display the SPR groups
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"info spr " - display SPRs in 
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"info spr " - display value in 
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"spr  " - set  to 
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Breaking for exceptions
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You have to set a bit in the Debug Stop Register "dsr" for each exception you want
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to stop on. Use "spr dsr ".

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