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/* dyn_rec.c -- Dynamic recompiler implementation for or32

   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org

This file is part of OpenRISC 1000 Architectural Simulator.

This program is free software; you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation; either version 2 of the License, or

(at your option) any later version.

This program is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

You should have received a copy of the GNU General Public License

along with this program; if not, write to the Free Software

Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */

#include <stdio.h>

#include <stdlib.h>

#include <string.h>

#include <sys/mman.h>

#include <signal.h>

#include <errno.h>

#include <execinfo.h>

#include "config.h"

#ifdef HAVE_INTTYPES_H

#include <inttypes.h>

#endif

#include "port.h"

#include "arch.h"

#include "immu.h"

#include "abstract.h"

#include "opcode/or32.h"

#include "spr_defs.h"

#include "execute.h"

#include "except.h"

#include "spr_defs.h"

#include "sim-config.h"

#include "sched.h"

#include "rec_i386.h"

#include "i386_regs.h"

#include "dyn_rec.h"

#include "gen_ops.h"

#include "op_support.h"

/* NOTE: All openrisc (or) addresses in this file are *PHYSICAL* addresses */

/* FIXME: Optimise sorted list adding */

typedef void (*generic_gen_op)(struct op_queue *opq, int end);

typedef void (*imm_gen_op)(struct op_queue *opq, int end, uorreg_t imm);

void gen_l_invalid(struct op_queue *opq, int param_t[3], orreg_t param[3],

                   int delay_slot);

static const generic_gen_op gen_op_move_gpr_t[NUM_T_REGS][32] = {

 { NULL,

   gen_op_move_gpr1_t0,

   gen_op_move_gpr2_t0,

   gen_op_move_gpr3_t0,

   gen_op_move_gpr4_t0,

   gen_op_move_gpr5_t0,

   gen_op_move_gpr6_t0,

   gen_op_move_gpr7_t0,

   gen_op_move_gpr8_t0,

   gen_op_move_gpr9_t0,

   gen_op_move_gpr10_t0,

   gen_op_move_gpr11_t0,

   gen_op_move_gpr12_t0,

   gen_op_move_gpr13_t0,

   gen_op_move_gpr14_t0,

   gen_op_move_gpr15_t0,

   gen_op_move_gpr16_t0,

   gen_op_move_gpr17_t0,

   gen_op_move_gpr18_t0,

   gen_op_move_gpr19_t0,

   gen_op_move_gpr20_t0,

   gen_op_move_gpr21_t0,

   gen_op_move_gpr22_t0,

   gen_op_move_gpr23_t0,

   gen_op_move_gpr24_t0,

   gen_op_move_gpr25_t0,

   gen_op_move_gpr26_t0,

   gen_op_move_gpr27_t0,

   gen_op_move_gpr28_t0,

   gen_op_move_gpr29_t0,

   gen_op_move_gpr30_t0,

   gen_op_move_gpr31_t0 },

 { NULL,

   gen_op_move_gpr1_t1,

   gen_op_move_gpr2_t1,

   gen_op_move_gpr3_t1,

   gen_op_move_gpr4_t1,

   gen_op_move_gpr5_t1,

   gen_op_move_gpr6_t1,

   gen_op_move_gpr7_t1,

   gen_op_move_gpr8_t1,

   gen_op_move_gpr9_t1,

   gen_op_move_gpr10_t1,

   gen_op_move_gpr11_t1,

   gen_op_move_gpr12_t1,

   gen_op_move_gpr13_t1,

   gen_op_move_gpr14_t1,

   gen_op_move_gpr15_t1,

   gen_op_move_gpr16_t1,

   gen_op_move_gpr17_t1,

   gen_op_move_gpr18_t1,

   gen_op_move_gpr19_t1,

   gen_op_move_gpr20_t1,

   gen_op_move_gpr21_t1,

   gen_op_move_gpr22_t1,

   gen_op_move_gpr23_t1,

   gen_op_move_gpr24_t1,

   gen_op_move_gpr25_t1,

   gen_op_move_gpr26_t1,

   gen_op_move_gpr27_t1,

   gen_op_move_gpr28_t1,

   gen_op_move_gpr29_t1,

   gen_op_move_gpr30_t1,

   gen_op_move_gpr31_t1 },

 { NULL,

   gen_op_move_gpr1_t2,

   gen_op_move_gpr2_t2,

   gen_op_move_gpr3_t2,

   gen_op_move_gpr4_t2,

   gen_op_move_gpr5_t2,

   gen_op_move_gpr6_t2,

   gen_op_move_gpr7_t2,

   gen_op_move_gpr8_t2,

   gen_op_move_gpr9_t2,

   gen_op_move_gpr10_t2,

   gen_op_move_gpr11_t2,

   gen_op_move_gpr12_t2,

   gen_op_move_gpr13_t2,

   gen_op_move_gpr14_t2,

   gen_op_move_gpr15_t2,

   gen_op_move_gpr16_t2,

   gen_op_move_gpr17_t2,

   gen_op_move_gpr18_t2,

   gen_op_move_gpr19_t2,

   gen_op_move_gpr20_t2,

   gen_op_move_gpr21_t2,

   gen_op_move_gpr22_t2,

   gen_op_move_gpr23_t2,

   gen_op_move_gpr24_t2,

   gen_op_move_gpr25_t2,

   gen_op_move_gpr26_t2,

   gen_op_move_gpr27_t2,

   gen_op_move_gpr28_t2,

   gen_op_move_gpr29_t2,

   gen_op_move_gpr30_t2,

   gen_op_move_gpr31_t2 } };

static const generic_gen_op gen_op_move_t_gpr[NUM_T_REGS][32] = {

 { NULL,

   gen_op_move_t0_gpr1,

   gen_op_move_t0_gpr2,

   gen_op_move_t0_gpr3,

   gen_op_move_t0_gpr4,

   gen_op_move_t0_gpr5,

   gen_op_move_t0_gpr6,

   gen_op_move_t0_gpr7,

   gen_op_move_t0_gpr8,

   gen_op_move_t0_gpr9,

   gen_op_move_t0_gpr10,

   gen_op_move_t0_gpr11,

   gen_op_move_t0_gpr12,

   gen_op_move_t0_gpr13,

   gen_op_move_t0_gpr14,

   gen_op_move_t0_gpr15,

   gen_op_move_t0_gpr16,

   gen_op_move_t0_gpr17,

   gen_op_move_t0_gpr18,

   gen_op_move_t0_gpr19,

   gen_op_move_t0_gpr20,

   gen_op_move_t0_gpr21,

   gen_op_move_t0_gpr22,

   gen_op_move_t0_gpr23,

   gen_op_move_t0_gpr24,

   gen_op_move_t0_gpr25,

   gen_op_move_t0_gpr26,

   gen_op_move_t0_gpr27,

   gen_op_move_t0_gpr28,

   gen_op_move_t0_gpr29,

   gen_op_move_t0_gpr30,

   gen_op_move_t0_gpr31 },

 { NULL,

   gen_op_move_t1_gpr1,

   gen_op_move_t1_gpr2,

   gen_op_move_t1_gpr3,

   gen_op_move_t1_gpr4,

   gen_op_move_t1_gpr5,

   gen_op_move_t1_gpr6,

   gen_op_move_t1_gpr7,

   gen_op_move_t1_gpr8,

   gen_op_move_t1_gpr9,

   gen_op_move_t1_gpr10,

   gen_op_move_t1_gpr11,

   gen_op_move_t1_gpr12,

   gen_op_move_t1_gpr13,

   gen_op_move_t1_gpr14,

   gen_op_move_t1_gpr15,

   gen_op_move_t1_gpr16,

   gen_op_move_t1_gpr17,

   gen_op_move_t1_gpr18,

   gen_op_move_t1_gpr19,

   gen_op_move_t1_gpr20,

   gen_op_move_t1_gpr21,

   gen_op_move_t1_gpr22,

   gen_op_move_t1_gpr23,

   gen_op_move_t1_gpr24,

   gen_op_move_t1_gpr25,

   gen_op_move_t1_gpr26,

   gen_op_move_t1_gpr27,

   gen_op_move_t1_gpr28,

   gen_op_move_t1_gpr29,

   gen_op_move_t1_gpr30,

   gen_op_move_t1_gpr31 },

 { NULL,

   gen_op_move_t2_gpr1,

   gen_op_move_t2_gpr2,

   gen_op_move_t2_gpr3,

   gen_op_move_t2_gpr4,

   gen_op_move_t2_gpr5,

   gen_op_move_t2_gpr6,

   gen_op_move_t2_gpr7,

   gen_op_move_t2_gpr8,

   gen_op_move_t2_gpr9,

   gen_op_move_t2_gpr10,

   gen_op_move_t2_gpr11,

   gen_op_move_t2_gpr12,

   gen_op_move_t2_gpr13,

   gen_op_move_t2_gpr14,

   gen_op_move_t2_gpr15,

   gen_op_move_t2_gpr16,

   gen_op_move_t2_gpr17,

   gen_op_move_t2_gpr18,

   gen_op_move_t2_gpr19,

   gen_op_move_t2_gpr20,

   gen_op_move_t2_gpr21,

   gen_op_move_t2_gpr22,

   gen_op_move_t2_gpr23,

   gen_op_move_t2_gpr24,

   gen_op_move_t2_gpr25,

   gen_op_move_t2_gpr26,

   gen_op_move_t2_gpr27,

   gen_op_move_t2_gpr28,

   gen_op_move_t2_gpr29,

   gen_op_move_t2_gpr30,

   gen_op_move_t2_gpr31 } };

static const imm_gen_op calc_insn_ea_table[NUM_T_REGS] =

 { gen_op_calc_insn_ea_t0, gen_op_calc_insn_ea_t1, gen_op_calc_insn_ea_t2 };

/* Linker stubs.  This will allow the linker to link in op.o.  The relocations

 * that the linker does for these will be irrelevent anyway, since we patch the

 * relocations during recompilation. */

uorreg_t __op_param1;

uorreg_t __op_param2;

uorreg_t __op_param3;

/* The number of bytes that a dynamicly recompiled page should be enlarged by */

#define RECED_PAGE_ENLARGE_BY 51200

/* The number of entries that the micro operations array in op_queue should be

 * enlarged by */

#define OPS_ENLARGE_BY 5

#define T_NONE (-1)

void *rec_stack_base;

/* FIXME: Put this into some header */

extern int do_stats;

static int sigsegv_state = 0;

static void *sigsegv_addr = NULL;

void dyn_ret_stack_prot(void);

void dyn_sigsegv_debug(int u, siginfo_t *siginf, void *dat)

{

  struct dyn_page *dp;

  FILE *f;

  char filen[18]; /* 18 == strlen("or_page.%08x") + 1 */

  void *stack;

  int i, j;

  void *trace[11];

  int num_trace;

  char **trace_names;

  struct sigcontext *sigc = dat;

  if(!sigsegv_state) {

    sigsegv_addr = siginf->si_addr;

  } else {

    fprintf(stderr, "Nested SIGSEGV occured, dumping next chuck of info\n");

    sigsegv_state++;

  }

  /* First dump all the data that does not need dereferenceing to get */

  switch(sigsegv_state) {

  case 0:

    fflush(stderr);

    fprintf(stderr, "Segmentation fault on acces to %p at 0x%08lx, (or address: 0x%"PRIxADDR")\n\n",

            sigsegv_addr, sigc->eip, get_pc());

    sigsegv_state++;

  case 1:

    /* Run through the recompiled pages, dumping them to disk as we go */

    for(dp = cpu_state.dyn_pages; dp; dp = dp->next) {

      fprintf(stderr, "Dumping%s page 0x%"PRIxADDR" recompiled to %p (len: %u) to disk\n",

             dp->dirty ? " dirty" : "", dp->or_page, dp->host_page,

             dp->host_len);

      fflush(stdout);

      sprintf(filen, "or_page.%"PRIxADDR, dp->or_page);

      if(!(f = fopen(filen, "w"))) {

        fprintf(stderr, "Unable to open %s to dump the recompiled page to: %s\n",

                filen, strerror(errno));

        continue;

      }

      if(fwrite(dp->host_page, dp->host_len, 1, f) < 1)

        fprintf(stderr, "Unable to write recompiled data to file: %s\n",

                strerror(errno));

      fclose(f);

    }

    sigsegv_state++;

  case 2:

    /* Dump the contents of the stack */

    fprintf(stderr, "Stack dump: ");

    fflush(stderr);

    num_trace = backtrace(trace, 10);

    trace[num_trace++] = (void *)sigc->eip;

    trace_names = backtrace_symbols(trace, num_trace);

    stack = get_sp();

    fprintf(stderr, "(of stack at %p, base: %p)\n", stack, rec_stack_base);

    fflush(stderr);

    for(i = 0; stack < rec_stack_base; i++, stack += 4) {

      fprintf(stderr, " <%i> 0x%08x", i, *(uint32_t *)stack);

      /* Try to find a symbolic name with this entry */

      for(j = 0; j < num_trace; j++) {

        if(trace[j] == *(void **)stack)

          fprintf(stderr, " <%s>", trace_names[j]);

      }

      fprintf(stderr, "\n");

      fflush(stderr);

    }

    fprintf(stderr, "Fault at: 0x%08lx <%s>\n", sigc->eip,

            trace_names[num_trace - 1]);

    sigsegv_state++;

  case 3:

    sim_done();

  }

}

static void add_to_dp(struct dyn_page *new)

{

  struct dyn_page *cur;

  struct dyn_page *prev;

  /* Find the location to insert the address */

  for(cur = cpu_state.dyn_pages, prev = NULL; cur; prev = cur, cur = cur->next) {

    if(cur->or_page > new->or_page)

      break;

  }

  if(prev)

    prev->next = new;

  else

    cpu_state.dyn_pages = new;

  new->next = cur;

}

struct dyn_page *new_dp(oraddr_t page)

{

  struct dyn_page *dp = malloc(sizeof(struct dyn_page));

  dp->or_page = IADDR_PAGE(page);

  dp->locs = malloc(sizeof(void *) * (config.immu.pagesize / 4));

  dp->host_len = 0;

  dp->host_page = NULL;

  dp->dirty = 1;

  add_to_dp(dp);

  return dp;

}

struct dyn_page *find_dynd_page(oraddr_t addr)

{

  struct dyn_page *cur = cpu_state.dyn_pages;

  addr &= ~(config.immu.pagesize - 1);

  while(cur) {

    if(cur->or_page == addr)

      return cur;

    if(cur->or_page > addr)

      return NULL; /* The dyn_page linked list is ordered */

    cur = cur->next;

  }

  return NULL;

}

/* This is called whenever the immu is either enabled/disabled or reconfigured

 * while enabled.  This checks if an itlb miss would occour and updates the immu

 * hit delay counter */

void recheck_immu(int got_en_dis)

{

  oraddr_t addr = get_pc();

  extern int immu_ex_from_insn;

  if(cpu_state.delay_insn) {

    /* If an instruction pagefault or an ITLB miss would occur, it must appear

     * to have come from the jumped-to address */

    if(IADDR_PAGE(addr) == IADDR_PAGE(cpu_state.pc_delay)) {

      immu_ex_from_insn = 1;

      immu_translate(addr + 4);

      immu_ex_from_insn = 0;

      runtime.sim.mem_cycles = 0;

    }

    return;

  }

  if(IADDR_PAGE(addr) == IADDR_PAGE(addr + 4)) {

    /* If the next instruction is on another page then the immu will be checked

     * when the jump to the next page happens */

    immu_ex_from_insn = 1;

    immu_translate(addr + 4);

    immu_ex_from_insn = 0;

    /* If we had am immu hit then runtime.sim.mem_cycles will hold the value

     * config.immu.hitdelay, but this value is added to the cycle when the next

     * instruction is run */

    runtime.sim.mem_cycles = 0;

  }

  /* Only update the cycle decrementer if the mmu got enabled or disabled */

  if(got_en_dis == IMMU_GOT_ENABLED)

    /* Add the mmu hit delay to the cycle counter */

    upd_cycles_dec(cpu_state.curr_page->delayr - config.immu.hitdelay);

  else if(got_en_dis == IMMU_GOT_DISABLED) {

    upd_cycles_dec(cpu_state.curr_page->delayr);

    /* Since we updated the cycle decrementer above the immu hit delay will not

     * be added to the cycle counter for this instruction.  Compensate for this

     * by adding it now */

    /* FIXME: This is not correct here.  In the complex execution model the hit

     * delay is added to runtime.sim.mem_cycles which is only joined with the

     * cycle counter after analysis() and before the scheduler would run.

     * Therefore the scheduler will still be correct but analysis() will produce

     * wrong results just for this one instruction. */

    add_to_cycles(config.immu.hitdelay);

  }

}

/* Runs the scheduler.  Called from except_handler (and dirtyfy_page below) */

void run_sched_out_of_line(int add_normal)

{

  oraddr_t pc = get_pc();

  extern int immu_ex_from_insn;

  if(!cpu_state.ts_current)

    upd_reg_from_t(pc, 0);

  if(add_normal && do_stats) {

    cpu_state.iqueue.insn_addr = pc;

    cpu_state.iqueue.insn = eval_insn_direct(pc, !immu_ex_from_insn);

    cpu_state.iqueue.insn_index = insn_decode(cpu_state.iqueue.insn);

    runtime.cpu.instructions++;

    analysis(&cpu_state.iqueue);

  }

  /* Run the scheduler */

  if(add_normal)

    sched_add_cycles();

  op_join_mem_cycles();

  upd_sim_cycles();

  if(scheduler.job_queue->time <= 0)

    do_scheduler();

}

/* Signals a page as dirty */

void dirtyfy_page(struct dyn_page *dp)

{

  oraddr_t check;

  printf("Dirtyfying page 0x%"PRIxADDR"\n", dp->or_page);

  dp->dirty = 1;

  /* If the execution is currently in the page that was touched then recompile

   * it now and jump back to the point of execution */

  check = cpu_state.delay_insn ? cpu_state.pc_delay : get_pc() + 4;

  if(IADDR_PAGE(check) == dp->or_page) {

    run_sched_out_of_line(1);

    recompile_page(dp);

    cpu_state.delay_insn = 0;

    /* Jump out to the next instruction */

    do_jump(check);

  }

}

/* Checks to see if a write happened to a recompiled page.  If so marks it as

 * dirty */

void dyn_checkwrite(oraddr_t addr)

{

  /* FIXME: Do this with mprotect() */

  struct dyn_page *dp;

  /* Since the locations 0x0-0xff are nearly always written to in an exception

   * handler, ignore any writes to these locations.  If code ends up jumping

   * out there, we'll recompile when the jump actually happens. */

  if((addr > 0x100) && (dp = find_dynd_page(addr)) && !dp->dirty)

    dirtyfy_page(dp);

}

static void ship_gprs_out_t(struct op_queue *opq, int end, unsigned int *reg_t)

{

  int i;

  /* Before takeing the temporaries out, temporarily remove the op_do_sched

   * operation such that dyn_page->ts_bound shall be correct before the

   * scheduler runs */

  if(end && opq->num_ops && (opq->ops[opq->num_ops - 1] == op_do_sched_indx)) {

    opq->num_ops--;

    ship_gprs_out_t(opq, end, reg_t);

    gen_op_do_sched(opq, 1);

    return;

  }

  for(i = 0; i < NUM_T_REGS; i++) {

    if(reg_t[i] < 32)

      gen_op_move_gpr_t[i][reg_t[i]](opq, end);

  }

}

static int find_unused_t(unsigned int *pres_t, unsigned int *reg_t)

{

  int empty = -1; /* Invalid */

  int i;

  /* Try to find a temporary that does not contain a register and is not

   * needed to be preserved */

  for(i = 0; i < NUM_T_REGS; i++) {

    if(!pres_t[i]) {

      empty = i;

      if(reg_t[i] > 31)

        return i;

    }

  }

  return empty;

}

/* Checks if there is enough space in dp->host_page, if not grow it */

void *enough_host_page(struct dyn_page *dp, void *cur, unsigned int *len,

                       unsigned int amount)

{

  unsigned int used = cur - dp->host_page;

  /* The array is long enough */

  if((used + amount) <= *len)

    return cur;

  /* Reallocate */

  *len += RECED_PAGE_ENLARGE_BY;

  if(!(dp->host_page = realloc(dp->host_page, *len))) {

    fprintf(stderr, "OOM\n");

    exit(1);

  }

  return dp->host_page + used;

}

/* Adds an operation to the opq */

void add_to_opq(struct op_queue *opq, int end, int op)

{

  if(opq->num_ops == opq->ops_len) {

    opq->ops_len += OPS_ENLARGE_BY;

    if(!(opq->ops = realloc(opq->ops, opq->ops_len * sizeof(int)))) {

      fprintf(stderr, "OOM\n");

      exit(1);

    }

  }

  if(end)

    opq->ops[opq->num_ops] = op;

  else {

    /* Shift everything over by one */

    memmove(opq->ops + 1, opq->ops, opq->num_ops* sizeof(int));

    opq->ops[0] = op;

  }

  opq->num_ops++;

}

static void gen_op_mark_loc(struct op_queue *opq, int end)

{

  add_to_opq(opq, end, op_mark_loc_indx);

}

/* Adds a parameter to the opq */

void add_to_op_params(struct op_queue *opq, int end, unsigned long param)

{

  if(opq->num_ops_param == opq->ops_param_len) {

    opq->ops_param_len += OPS_ENLARGE_BY;

    if(!(opq->ops_param = realloc(opq->ops_param, opq->ops_param_len * sizeof(int)))) {

      fprintf(stderr, "OOM\n");

      exit(1);

    }

  }

  if(end)

    opq->ops_param[opq->num_ops_param] = param;

  else {

    /* Shift everything over by one */

    memmove(opq->ops_param + 1, opq->ops_param, opq->num_ops_param);

    opq->ops_param[0] = param;

  }

  opq->num_ops_param++;

}

/* Function to guard against rogue ret instructions in the operations */

void dyn_ret_stack_prot(void)

{

  fprintf(stderr, "An operation (I have no clue which) has a ret statement in it\n");

  fprintf(stderr, "Good luck debugging it!\n");

  exit(1);

}

/* Jumps out to some Openrisc address */

void jump_dyn_code(oraddr_t addr)

{

  set_pc(addr);

  do_jump(addr);

}

/* Initialises the recompiler */

void init_dyn_recomp(void)

{

  struct sigaction sigact;

  struct op_queue *opq;

  unsigned int i;

  cpu_state.opqs = NULL;

  /* Allocate the operation queue list (+1 for the page chaining) */

  for(i = 0; i < (config.immu.pagesize / 4) + 1; i++) {

    if(!(opq = malloc(sizeof(struct op_queue)))) {

      fprintf(stderr, "OOM\n");

      exit(1);

    }

    /* initialise some fields */

    opq->ops_len = 0;

    opq->ops = NULL;

    opq->ops_param_len = 0;

    opq->ops_param = NULL;

    opq->xref = 0;

    if(cpu_state.opqs)

      cpu_state.opqs->prev = opq;

    opq->next = cpu_state.opqs;

    cpu_state.opqs = opq;

  }

  opq->prev = NULL;

  /* Just some value that we'll use as the base for our stack */

  rec_stack_base = get_sp();

  cpu_state.curr_page = NULL;

  cpu_state.dyn_pages = NULL;

  /* Register our segmentation fault handler */

  sigact.sa_sigaction = dyn_sigsegv_debug;

  memset(&sigact.sa_mask, 0, sizeof(sigact.sa_mask));

  sigact.sa_flags = SA_SIGINFO | SA_NOMASK;

  if(sigaction(SIGSEGV, &sigact, NULL))