1 |
879 |
markom |
/* load.c -- OpenRISC Custom Unit Compiler, instruction loading and converting
|
2 |
|
|
* Copyright (C) 2002 Marko Mlinar, markom@opencores.org
|
3 |
|
|
*
|
4 |
|
|
* This file is part of OpenRISC 1000 Architectural Simulator.
|
5 |
|
|
*
|
6 |
|
|
* This program is free software; you can redistribute it and/or modify
|
7 |
|
|
* it under the terms of the GNU General Public License as published by
|
8 |
|
|
* the Free Software Foundation; either version 2 of the License, or
|
9 |
|
|
* (at your option) any later version.
|
10 |
|
|
*
|
11 |
|
|
* This program is distributed in the hope that it will be useful,
|
12 |
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 |
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
14 |
|
|
* GNU General Public License for more details.
|
15 |
|
|
*
|
16 |
|
|
* You should have received a copy of the GNU General Public License
|
17 |
|
|
* along with this program; if not, write to the Free Software
|
18 |
|
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
|
19 |
|
|
|
20 |
|
|
#include <stdio.h>
|
21 |
|
|
#include <stdlib.h>
|
22 |
|
|
#include <stdarg.h>
|
23 |
|
|
#include <assert.h>
|
24 |
|
|
#include "cuc.h"
|
25 |
|
|
#include "opcode/or32.h"
|
26 |
|
|
#include "insn.h"
|
27 |
|
|
|
28 |
|
|
static const cuc_conv conv[] = {
|
29 |
|
|
{"l.add", II_ADD}, {"l.addi", II_ADD},
|
30 |
|
|
{"l.sub", II_SUB}, {"l.subi", II_SUB},
|
31 |
|
|
{"l.and", II_AND}, {"l.andi", II_AND},
|
32 |
|
|
{"l.xor", II_XOR}, {"l.xori", II_XOR},
|
33 |
|
|
{"l.or", II_OR }, {"l.ori", II_OR},
|
34 |
|
|
{"l.mul", II_MUL}, {"l.muli", II_MUL},
|
35 |
|
|
|
36 |
|
|
{"l.sra", II_SRA}, {"l.srai", II_SRA},
|
37 |
|
|
{"l.srl", II_SRL}, {"l.srli", II_SRL},
|
38 |
|
|
{"l.sll", II_SLL}, {"l.slli", II_SLL},
|
39 |
|
|
|
40 |
|
|
{"l.lbz",II_LB | II_MEM}, {"l.lbs", II_LB | II_MEM | II_SIGNED},
|
41 |
|
|
{"l.lhz",II_LH | II_MEM}, {"l.lhs", II_LH | II_MEM | II_SIGNED},
|
42 |
|
|
{"l.lwz",II_LW | II_MEM}, {"l.lws", II_LW | II_MEM | II_SIGNED},
|
43 |
|
|
{"l.sb", II_SB | II_MEM}, {"l.sh", II_SH | II_MEM}, {"l.sw", II_SW | II_MEM},
|
44 |
|
|
{"l.sfeq", II_SFEQ }, {"l.sfeqi", II_SFEQ},
|
45 |
|
|
{"l.sfne", II_SFNE }, {"l.sfnei", II_SFNE},
|
46 |
|
|
{"l.sflts", II_SFLT | II_SIGNED}, {"l.sfltis", II_SFLT | II_SIGNED},
|
47 |
|
|
{"l.sfltu", II_SFLT}, {"l.sfltiu", II_SFLT},
|
48 |
|
|
{"l.sfgts", II_SFGT | II_SIGNED}, {"l.sfgtis", II_SFGT | II_SIGNED},
|
49 |
|
|
{"l.sfgtu", II_SFGT}, {"l.sfgtiu", II_SFGT},
|
50 |
|
|
{"l.sfges", II_SFGE | II_SIGNED}, {"l.sfgeis", II_SFGE | II_SIGNED},
|
51 |
|
|
{"l.sfgeu", II_SFGE}, {"l.sfgeiu", II_SFGE},
|
52 |
|
|
{"l.sfles", II_SFLE | II_SIGNED}, {"l.sfleis", II_SFLE | II_SIGNED},
|
53 |
|
|
{"l.sfleu", II_SFLE}, {"l.sfleiu", II_SFLE},
|
54 |
|
|
{"l.j", II_BF },
|
55 |
|
|
{"l.bf", II_BF },
|
56 |
|
|
{"l.nop", II_NOP }
|
57 |
|
|
};
|
58 |
|
|
|
59 |
|
|
/* Instructions from function */
|
60 |
|
|
cuc_insn insn[MAX_INSNS];
|
61 |
|
|
int num_insn;
|
62 |
|
|
int reloc[MAX_INSNS];
|
63 |
|
|
|
64 |
|
|
/* Prints out instructions */
|
65 |
|
|
void print_cuc_insns (char *s, int verbose)
|
66 |
|
|
{
|
67 |
|
|
int i, j;
|
68 |
|
|
printf ("****************** %s ******************\n", s);
|
69 |
|
|
print_insns (insn, num_insn,verbose);
|
70 |
|
|
printf ("\n\n");
|
71 |
|
|
}
|
72 |
|
|
|
73 |
|
|
void xchg_insn (int i, int j)
|
74 |
|
|
{
|
75 |
|
|
cuc_insn t;
|
76 |
|
|
t = insn[i];
|
77 |
|
|
insn[i] = insn[j];
|
78 |
|
|
insn[j] = t;
|
79 |
|
|
}
|
80 |
|
|
|
81 |
|
|
/* Remove delay slots */
|
82 |
|
|
void remove_dslots ()
|
83 |
|
|
{
|
84 |
|
|
int i;
|
85 |
|
|
int in_delay = 0;
|
86 |
|
|
for (i = 0; i < num_insn; i++) {
|
87 |
|
|
if (in_delay) insn[i].type |= IT_INDELAY;
|
88 |
|
|
in_delay = 0;
|
89 |
|
|
if (insn[i].type & IT_BRANCH) in_delay = 1;
|
90 |
|
|
if (insn[i].type & IT_INDELAY) {
|
91 |
|
|
/* delay slot should not be a branch target! */
|
92 |
|
|
assert ((insn[i].type & IT_BBSTART) == 0);
|
93 |
|
|
assert ((insn[i - 1].type & IT_INDELAY) == 0);
|
94 |
|
|
insn[i].type &= ~IT_INDELAY; /* no more in delay slot */
|
95 |
|
|
xchg_insn (i, i - 1);
|
96 |
|
|
}
|
97 |
|
|
}
|
98 |
|
|
assert (in_delay == 0);
|
99 |
|
|
}
|
100 |
|
|
|
101 |
|
|
/* Convert local variables (uses stack frame -- r1) to internal values */
|
102 |
|
|
void detect_locals ()
|
103 |
|
|
{
|
104 |
|
|
int stack[MAX_STACK];
|
105 |
|
|
int i, can_remove_stack = 1;
|
106 |
|
|
int real_stack_size = 0;
|
107 |
|
|
|
108 |
|
|
for (i = 0; i < MAX_STACK; i++) stack[i] = -1;
|
109 |
|
|
|
110 |
|
|
for (i = 0; i < num_insn; i++) {
|
111 |
|
|
/* sw off (r1),rx */
|
112 |
|
|
if (insn[i].index == II_SW
|
113 |
|
|
&& (insn[i].opt[0] & OPT_CONST)
|
114 |
|
|
&& insn[i].op[1] == 1 && (insn[i].opt[1] & OPT_REGISTER)) {
|
115 |
|
|
|
116 |
|
|
if (insn[i].op[0] < MAX_STACK) { /* Convert to normal move */
|
117 |
|
|
stack[insn[i].op[0]] = i;
|
118 |
|
|
insn[i].type &= IT_INDELAY | IT_BBSTART;
|
119 |
|
|
change_insn_type (&insn[i], II_ADD);
|
120 |
|
|
insn[i].op[0] = -1; insn[i].opt[0] = OPT_REGISTER | OPT_DEST;
|
121 |
|
|
insn[i].op[1] = insn[i].op[2]; insn[i].opt[1] = insn[i].opt[2];
|
122 |
|
|
insn[i].op[2] = 0; insn[i].opt[2] = OPT_CONST;
|
123 |
|
|
} else can_remove_stack = 0;
|
124 |
|
|
/* lw rx,off (r1) */
|
125 |
|
|
} else if (insn[i].index == II_LW
|
126 |
|
|
&& (insn[i].opt[1] & OPT_CONST)
|
127 |
|
|
&& insn[i].op[2] == 1 && (insn[i].opt[2] & OPT_REGISTER)) {
|
128 |
|
|
|
129 |
|
|
if (insn[i].op[1] < MAX_STACK) { /* Convert to normal move */
|
130 |
|
|
insn[i].type &= IT_INDELAY | IT_BBSTART;
|
131 |
|
|
change_insn_type (&insn[i], II_ADD);
|
132 |
|
|
assert (stack[insn[i].op[1]] >= 0);
|
133 |
|
|
insn[i].op[1] = stack[insn[i].op[1]]; insn[i].opt[1] = OPT_REF;
|
134 |
|
|
insn[i].op[2] = 0; insn[i].opt[2] = OPT_CONST;
|
135 |
|
|
} else can_remove_stack = 0;
|
136 |
|
|
/* Check for defined stack size */
|
137 |
|
|
} else if (insn[i].index == II_ADD && !real_stack_size
|
138 |
|
|
&& (insn[i].opt[0] & OPT_REGISTER) && insn[i].op[0] == 1
|
139 |
|
|
&& (insn[i].opt[1] & OPT_REGISTER) && insn[i].op[1] == 1
|
140 |
|
|
&& (insn[i].opt[2] & OPT_CONST)) {
|
141 |
|
|
real_stack_size = -insn[i].op[2];
|
142 |
|
|
}
|
143 |
|
|
}
|
144 |
|
|
assert (can_remove_stack); /* TODO */
|
145 |
|
|
}
|
146 |
|
|
|
147 |
|
|
/* Disassemble one instruction from insn index and generate parameters */
|
148 |
|
|
const char *build_insn (unsigned long data, cuc_insn *insn)
|
149 |
|
|
{
|
150 |
|
|
const char *name;
|
151 |
|
|
char *s;
|
152 |
|
|
extern char *disassembled;
|
153 |
|
|
int index = insn_decode (data);
|
154 |
|
|
struct or32_opcode const *opcode;
|
155 |
|
|
int i, argc = 0;
|
156 |
|
|
|
157 |
|
|
insn->insn = data;
|
158 |
|
|
insn->index = -1;
|
159 |
|
|
insn->type = 0;
|
160 |
|
|
name = insn_name (index);
|
161 |
|
|
insn->index = index;
|
162 |
|
|
disassemble_index (data, index);
|
163 |
|
|
strcpy (insn->disasm, disassembled);
|
164 |
|
|
insn->dep = NULL;
|
165 |
|
|
for (i = 0; i < MAX_OPERANDS; i++) insn->opt[i] = OPT_NONE;
|
166 |
|
|
|
167 |
|
|
if (index < 0) {
|
168 |
|
|
fprintf (stderr, "Invalid opcode 0x%08x!\n", data);
|
169 |
|
|
exit (1);
|
170 |
|
|
}
|
171 |
|
|
opcode = &or32_opcodes[index];
|
172 |
|
|
|
173 |
|
|
for (s = opcode->args; *s != '\0'; ++s) {
|
174 |
|
|
switch (*s) {
|
175 |
|
|
case '\0': return name;
|
176 |
|
|
case 'r':
|
177 |
|
|
insn->opt[argc] = OPT_REGISTER | (argc ? 0 : OPT_DEST);
|
178 |
|
|
insn->op[argc++] = or32_extract(*++s, opcode->encoding, data);
|
179 |
|
|
break;
|
180 |
|
|
|
181 |
|
|
default:
|
182 |
|
|
if (strchr (opcode->encoding, *s)) {
|
183 |
|
|
unsigned long imm = or32_extract (*s, opcode->encoding, data);
|
184 |
|
|
imm = extend_imm(imm, *s);
|
185 |
|
|
insn->opt[argc] = OPT_CONST;
|
186 |
|
|
insn->op[argc++] = imm;
|
187 |
|
|
}
|
188 |
|
|
}
|
189 |
|
|
}
|
190 |
|
|
return name;
|
191 |
|
|
}
|
192 |
|
|
|
193 |
|
|
/* expands immediate memory instructions to two */
|
194 |
|
|
void expand_memory ()
|
195 |
|
|
{
|
196 |
|
|
int i, j, num_mem = 0, d;
|
197 |
|
|
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_MEMORY) num_mem++;
|
198 |
|
|
|
199 |
|
|
d = num_insn + num_mem;
|
200 |
|
|
assert (d < MAX_INSNS);
|
201 |
|
|
|
202 |
|
|
/* Split memory commands */
|
203 |
|
|
for (i = num_insn - 1; i >= 0; i--) if (insn[i].type & IT_MEMORY) {
|
204 |
|
|
insn[--d] = insn[i];
|
205 |
|
|
insn[--d] = insn[i];
|
206 |
|
|
reloc[i] = d;
|
207 |
|
|
switch (insn[d].index) {
|
208 |
|
|
case II_SW:
|
209 |
|
|
case II_SH:
|
210 |
|
|
case II_SB:
|
211 |
|
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST; /* add rd, ra, rb */
|
212 |
|
|
insn[d].op[2] = insn[i].op[0]; insn[d].opt[2] = insn[i].opt[0];
|
213 |
|
|
insn[d].opt[3] = OPT_NONE;
|
214 |
|
|
insn[d].type &= IT_INDELAY | IT_BBSTART;
|
215 |
|
|
insn[d].type |= IT_MEMADD;
|
216 |
|
|
change_insn_type (&insn[d], II_ADD);
|
217 |
|
|
insn[d + 1].op[1] = d; insn[d + 1].opt[1] = OPT_REF; /* sw (t($-1)),rx */
|
218 |
|
|
insn[d + 1].op[0] = insn[i].op[2]; insn[d + 1].opt[0] = insn[i].opt[2];
|
219 |
|
|
insn[d + 1].opt[2] = OPT_NONE;
|
220 |
|
|
insn[d + 1].type &= ~IT_BBSTART;
|
221 |
|
|
break;
|
222 |
|
|
case II_LW:
|
223 |
|
|
case II_LH:
|
224 |
|
|
case II_LB:
|
225 |
|
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST; /* add rd, ra, rb */
|
226 |
|
|
insn[d].type &= IT_INDELAY | IT_BBSTART;
|
227 |
|
|
insn[d].type |= IT_MEMADD;
|
228 |
|
|
change_insn_type (&insn[d], II_ADD);
|
229 |
|
|
insn[d + 1].op[1] = d; insn[d + 1].opt[1] = OPT_REF; /* lw (t($-1)),rx */
|
230 |
|
|
insn[d + 1].opt[2] = OPT_NONE;
|
231 |
|
|
insn[d + 1].opt[3] = OPT_NONE;
|
232 |
|
|
insn[d + 1].type &= ~IT_BBSTART;
|
233 |
|
|
break;
|
234 |
|
|
default: fprintf (stderr, "%4i, %4i: %s\n", i, d, cuc_insn_name (&insn[d]));
|
235 |
|
|
assert (0);
|
236 |
|
|
}
|
237 |
|
|
} else {
|
238 |
|
|
insn[--d] = insn[i];
|
239 |
|
|
reloc[i] = d;
|
240 |
|
|
}
|
241 |
|
|
num_insn += num_mem;
|
242 |
|
|
for (i = 0; i < num_insn; i++) if (!(insn[i].type & IT_MEMORY))
|
243 |
|
|
for (j = 0; j < MAX_OPERANDS; j++)
|
244 |
|
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
245 |
|
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
246 |
|
|
}
|
247 |
|
|
|
248 |
|
|
/* expands signed comparisons to three instructions */
|
249 |
|
|
void expand_signed ()
|
250 |
|
|
{
|
251 |
|
|
int i, j, num_sig = 0, d;
|
252 |
|
|
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_SIGNED) num_sig++;
|
253 |
|
|
|
254 |
|
|
d = num_insn + num_sig * 2;
|
255 |
|
|
assert (d < MAX_INSNS);
|
256 |
|
|
|
257 |
|
|
/* Split signed instructions */
|
258 |
|
|
for (i = num_insn - 1; i >= 0; i--) if (insn[i].type & IT_SIGNED) {
|
259 |
|
|
/* We will expand signed memory later */
|
260 |
|
|
if (insn[i].type & IT_MEMORY) continue;
|
261 |
|
|
insn[--d] = insn[i];
|
262 |
|
|
insn[d].op[1] = d - 2; insn[d].opt[1] = OPT_REF;
|
263 |
|
|
insn[d].op[2] = d - 1; insn[d].opt[2] = OPT_REF;
|
264 |
|
|
|
265 |
|
|
insn[--d] = insn[i];
|
266 |
|
|
change_insn_type (&insn[d], II_ADD);
|
267 |
|
|
insn[d].type = 0;
|
268 |
|
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
269 |
|
|
insn[d].op[1] = insn[d].op[2]; insn[d].opt[1] = insn[d].opt[2];
|
270 |
|
|
insn[d].op[2] = 0x20000000; insn[d].opt[2] = OPT_CONST;
|
271 |
|
|
insn[d].opt[3] = OPT_NONE;
|
272 |
|
|
|
273 |
|
|
insn[--d] = insn[i];
|
274 |
|
|
change_insn_type (&insn[d], II_ADD);
|
275 |
|
|
insn[d].type = 0;
|
276 |
|
|
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
|
277 |
|
|
insn[d].op[1] = insn[d].op[1]; insn[d].opt[1] = insn[d].opt[1];
|
278 |
|
|
insn[d].op[2] = 0x20000000; insn[d].opt[2] = OPT_CONST;
|
279 |
|
|
insn[d].opt[3] = OPT_NONE;
|
280 |
|
|
|
281 |
|
|
reloc[i] = d;
|
282 |
|
|
} else {
|
283 |
|
|
insn[--d] = insn[i];
|
284 |
|
|
reloc[i] = d;
|
285 |
|
|
}
|
286 |
|
|
num_insn += num_sig * 2;
|
287 |
|
|
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_MEMORY || !(insn[i].type & IT_SIGNED)) {
|
288 |
|
|
for (j = 0; j < MAX_OPERANDS; j++)
|
289 |
|
|
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
|
290 |
|
|
insn[i].op[j] = reloc[insn[i].op[j]];
|
291 |
|
|
} else insn[i].type &= ~IT_SIGNED;
|
292 |
|
|
}
|
293 |
|
|
|
294 |
|
|
/* CSE -- common subexpression elimination */
|
295 |
|
|
void cse ()
|
296 |
|
|
{
|
297 |
|
|
int i, j, k, l;
|
298 |
|
|
for (i = 0; i < num_insn; i++)
|
299 |
|
|
for (j = 0; j < i; j++) {
|
300 |
|
|
if (insn[i].index == insn[j].index) continue;
|
301 |
|
|
if (insn[i].type & IT_VOLATILE) continue;
|
302 |
|
|
|
303 |
|
|
/* Do we have an exact match? */
|
304 |
|
|
if (insn[i].op[1] != insn[j].op[1] || insn[i].opt[1] != insn[j].opt[1]) continue;
|
305 |
|
|
if (insn[i].op[2] != insn[j].op[2] || insn[i].opt[2] != insn[j].opt[2]) continue;
|
306 |
|
|
|
307 |
|
|
/* Check if we drive outputs? */
|
308 |
|
|
if ((insn[i].opt[0] & OPT_REGISTER) && insn[i].op[0] >= 0)
|
309 |
|
|
if ((insn[j].opt[0] & OPT_REGISTER) && insn[j].op[0] >= 0) continue;
|
310 |
|
|
else insn[j].op[0] = insn[i].op[0];
|
311 |
|
|
|
312 |
|
|
/* remove duplicated instruction and relink the references */
|
313 |
|
|
change_insn_type (&insn[i], II_NOP);
|
314 |
|
|
for (k = i + 1; k < num_insn; k++)
|
315 |
|
|
for (l = 0; l < MAX_OPERANDS; l++)
|
316 |
|
|
if (insn[k].op[l] == i && (insn[k].opt[l] & OPT_REF)) insn[k].op[l] = j;
|
317 |
|
|
}
|
318 |
|
|
}
|
319 |
|
|
|
320 |
|
|
/* Loads from file into global array insn */
|
321 |
|
|
void cuc_load (char *in_fn)
|
322 |
|
|
{
|
323 |
|
|
int i, j, in_delay;
|
324 |
|
|
FILE *fi;
|
325 |
|
|
int func_return = 0;
|
326 |
|
|
num_insn = 0;
|
327 |
|
|
|
328 |
|
|
log ("Loading filename %s\n", in_fn);
|
329 |
|
|
if ((fi = fopen (in_fn, "rt")) == NULL) {
|
330 |
|
|
fprintf (stderr, "Cannot open '%s'\n", in_fn);
|
331 |
|
|
exit (1);
|
332 |
|
|
}
|
333 |
|
|
/* Read in the function and decode the instructions */
|
334 |
|
|
for (i = 0;; i++) {
|
335 |
|
|
unsigned long data;
|
336 |
|
|
extern char *disassembled;
|
337 |
|
|
const char *name;
|
338 |
|
|
|
339 |
|
|
if (fscanf (fi, "%08x\n", &data) != 1) break;
|
340 |
|
|
|
341 |
|
|
/* build params */
|
342 |
|
|
name = build_insn (data, &insn[i]);
|
343 |
|
|
if (func_return) func_return++;
|
344 |
|
|
//printf ("%s\n", name);
|
345 |
|
|
|
346 |
|
|
if (or32_opcodes[insn[i].index].flags & OR32_IF_DELAY) {
|
347 |
|
|
int f;
|
348 |
|
|
if (strcmp (name, "l.bnf") == 0) f = 1;
|
349 |
|
|
else if (strcmp (name, "l.bf") == 0) f = 0;
|
350 |
|
|
else if (strcmp (name, "l.j") == 0) {
|
351 |
|
|
f = -1;
|
352 |
|
|
} else if (strcmp (name, "l.jr") == 0 && func_return == 0) {
|
353 |
|
|
func_return = 1;
|
354 |
|
|
change_insn_type (&insn[i], II_NOP);
|
355 |
|
|
continue;
|
356 |
|
|
} else {
|
357 |
|
|
fprintf (stderr, "Instruction #%i: \"%s\" not supported.\n", i, name);
|
358 |
|
|
exit (1);
|
359 |
|
|
}
|
360 |
|
|
if (f < 0) { /* l.j */
|
361 |
|
|
/* repair params */
|
362 |
|
|
change_insn_type (&insn[i], II_BF);
|
363 |
|
|
insn[i].op[0] = i + insn[i].op[0]; insn[i].opt[0] = OPT_JUMP;
|
364 |
|
|
insn[i].op[1] = 1; insn[i].opt[1] = OPT_CONST;
|
365 |
|
|
insn[i].type |= IT_BRANCH | IT_VOLATILE;
|
366 |
|
|
} else {
|
367 |
|
|
i--;
|
368 |
|
|
if (f) {
|
369 |
|
|
//printf ("%s\n", cuc_insn_name (&insn[i]));
|
370 |
|
|
if (insn[i].index == II_SFEQ) change_insn_type (&insn[i], II_SFNE);
|
371 |
|
|
else if (insn[i].index == II_SFNE) change_insn_type (&insn[i], II_SFEQ);
|
372 |
|
|
else if (insn[i].index == II_SFLT) change_insn_type (&insn[i], II_SFGE);
|
373 |
|
|
else if (insn[i].index == II_SFGT) change_insn_type (&insn[i], II_SFLE);
|
374 |
|
|
else if (insn[i].index == II_SFLE) change_insn_type (&insn[i], II_SFGT);
|
375 |
|
|
else if (insn[i].index == II_SFGE) change_insn_type (&insn[i], II_SFLT);
|
376 |
|
|
else assert (0);
|
377 |
|
|
}
|
378 |
|
|
/* repair params */
|
379 |
|
|
insn[i].op[2] = insn[i].op[1]; insn[i].opt[2] = insn[i].opt[1] & ~OPT_DEST;
|
380 |
|
|
insn[i].op[1] = insn[i].op[0]; insn[i].opt[1] = insn[i].opt[0] & ~OPT_DEST;
|
381 |
|
|
insn[i].op[0] = FLAG_REG; insn[i].opt[0] = OPT_DEST | OPT_REGISTER;
|
382 |
|
|
insn[i].opt[3] = OPT_NONE;
|
383 |
|
|
insn[i].type |= IT_COND;
|
384 |
|
|
i++;
|
385 |
|
|
change_insn_type (&insn[i], II_BF);
|
386 |
|
|
insn[i].op[0] = i + insn[i].op[0]; insn[i].opt[0] = OPT_JUMP;
|
387 |
|
|
insn[i].op[1] = FLAG_REG; insn[i].opt[1] = OPT_REGISTER;
|
388 |
|
|
insn[i].type |= IT_BRANCH | IT_VOLATILE;
|
389 |
|
|
}
|
390 |
|
|
} else {
|
391 |
|
|
insn[i].index = -1;
|
392 |
|
|
for (j = 0; j < sizeof (conv) / sizeof (cuc_conv); j++)
|
393 |
|
|
if (strcmp (conv[j].from, name) == 0) {
|
394 |
|
|
const int x = conv[j].to;
|
395 |
|
|
if (conv[j].to & II_SIGNED) insn[i].type |= IT_SIGNED;
|
396 |
|
|
if (conv[j].to & II_MEM) insn[i].type |= IT_MEMORY | IT_VOLATILE;
|
397 |
|
|
change_insn_type (&insn[i], conv[j].to & II_MASK);
|
398 |
|
|
break;
|
399 |
|
|
}
|
400 |
|
|
if (insn[i].index < 0) {
|
401 |
|
|
fprintf (stderr, "Instruction #%i: \"%s\" not supported (2).\n", i, name);
|
402 |
|
|
exit (1);
|
403 |
|
|
}
|
404 |
|
|
}
|
405 |
|
|
}
|
406 |
|
|
num_insn = i;
|
407 |
|
|
fclose (fi);
|
408 |
|
|
if (func_return != 2) {
|
409 |
|
|
fprintf (stderr, "Unsupported function structure.\n");
|
410 |
|
|
exit (1);
|
411 |
|
|
}
|
412 |
|
|
|
413 |
|
|
log ("Number of instructions loaded = %i\n", num_insn);
|
414 |
|
|
if (DEBUG > 3) print_cuc_insns ("INITIAL", 1);
|
415 |
|
|
|
416 |
|
|
log ("Converting.\n");
|
417 |
|
|
remove_dslots ();
|
418 |
|
|
if (DEBUG > 8) print_cuc_insns ("NO_DELAY_SLOTS", 0);
|
419 |
|
|
|
420 |
|
|
if (calling_convention) {
|
421 |
|
|
detect_locals ();
|
422 |
|
|
if (DEBUG > 7) print_cuc_insns ("AFTER_LOCALS", 0);
|
423 |
|
|
}
|
424 |
|
|
expand_memory ();
|
425 |
|
|
if (DEBUG > 3) print_cuc_insns ("AFTER_EXP_MEM", 0);
|
426 |
|
|
|
427 |
|
|
expand_signed ();
|
428 |
|
|
if (DEBUG > 3) print_cuc_insns ("AFTER_EXP_SIG", 0);
|
429 |
|
|
|
430 |
|
|
log ("Common subexpression elimination.\n");
|
431 |
|
|
cse ();
|
432 |
|
|
if (DEBUG > 8) print_cuc_insns ("AFTER_CSE", 0);
|
433 |
|
|
}
|