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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [peripheral/] [ethernet_i.h] - Blame information for rev 1244

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1 346 erez
/* ethernet_i.h -- Definition of internal types and structures for Ethernet MAC
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   Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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   This file is part of OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 2 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program; if not, write to the Free Software
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   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __OR1KSIM_PERIPHERAL_ETHERNET_I_H
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#define __OR1KSIM_PERIPHERAL_ETHERNET_I_H
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#include "ethernet.h"
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#include "config.h"
26 849 markom
 
27 867 markom
#if HAVE_ETH_PHY
28 702 ivang
#include <netpacket/packet.h>
29 849 markom
#endif /* HAVE_ETH_PHY */
30 702 ivang
#include <sys/ioctl.h>
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#include <sys/socket.h>
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#include <net/if.h>
33 346 erez
 
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/*
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 * Ethernet protocol definitions
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 */
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#if HAVE_NET_ETHERNET_H
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# include <net/ethernet.h>
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#else /* !HAVE_NET_ETHERNET_H -*/
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#include <sys/types.h>
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43 1146 phoenix
#ifdef __CYGWIN__
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/* define some missing cygwin defines.
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 *
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 * NOTE! there is no nonblocking socket option implemented in cygwin.dll
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 *       so defining MSG_DONTWAIT is just (temporary) workaround !!!
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 */
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#define MSG_DONTWAIT  0x40
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#define ETH_HLEN      14
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#endif /* __CYGWIN__ */
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53 702 ivang
#define ETH_ALEN    6
54 346 erez
 
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struct ether_addr
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{
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  u_int8_t ether_addr_octet[ETH_ALEN];
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};
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struct ether_header
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{
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  u_int8_t  ether_dhost[ETH_ALEN];      /* destination eth addr */
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  u_int8_t  ether_shost[ETH_ALEN];      /* source ether addr    */
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  u_int16_t ether_type;                 /* packet type ID field */
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};
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/* Ethernet protocol ID's */
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#define ETHERTYPE_PUP           0x0200          /* Xerox PUP */
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#define ETHERTYPE_IP            0x0800          /* IP */
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#define ETHERTYPE_ARP           0x0806          /* Address resolution */
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#define ETHERTYPE_REVARP        0x8035          /* Reverse ARP */
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#define ETHER_ADDR_LEN  ETH_ALEN                 /* size of ethernet addr */
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#define ETHER_TYPE_LEN  2                        /* bytes in type field */
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#define ETHER_CRC_LEN   4                        /* bytes in CRC field */
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#define ETHER_HDR_LEN   ETH_HLEN                 /* total octets in header */
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#define ETHER_MIN_LEN   (ETH_ZLEN + ETHER_CRC_LEN) /* min packet length */
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#define ETHER_MAX_LEN   (ETH_FRAME_LEN + ETHER_CRC_LEN) /* max packet length */
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/* make sure ethenet length is valid */
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#define ETHER_IS_VALID_LEN(foo) \
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        ((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN)
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/*
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 * The ETHERTYPE_NTRAILER packet types starting at ETHERTYPE_TRAIL have
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 * (type-ETHERTYPE_TRAIL)*512 bytes of data followed
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 * by an ETHER type (as given above) and then the (variable-length) header.
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 */
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#define ETHERTYPE_TRAIL         0x1000          /* Trailer packet */
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#define ETHERTYPE_NTRAILER      16
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#define ETHERMTU        ETH_DATA_LEN
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#define ETHERMIN        (ETHER_MIN_LEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
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#endif /* HAVE_NET_ETHERNET_H */
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/*
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 * Implementatino of Ethernet MAC Registers and State
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 */
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#define ETH_TXSTATE_IDLE        0
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#define ETH_TXSTATE_WAIT4BD     10
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#define ETH_TXSTATE_READFIFO    20
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#define ETH_TXSTATE_TRANSMIT    30
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#define ETH_RXSTATE_IDLE        0
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#define ETH_RXSTATE_WAIT4BD     10
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#define ETH_RXSTATE_RECV        20
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#define ETH_RXSTATE_WRITEFIFO   30
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#define ETH_RTX_FILE    0
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#define ETH_RTX_SOCK    1
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#define ETH_RTX_VAPI    2
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#define ETH_MAXPL   0x10000
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117 889 ivang
enum { ETH_VAPI_DATA = 0,
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       ETH_VAPI_CTRL,
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       ETH_NUM_VAPI_IDS };
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121 346 erez
struct eth_device
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{
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  /* Base address in memory */
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  unsigned long baseaddr;
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  /* Which Ethernet MAC is this? */
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  unsigned eth_number;
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  /* Which DMA controller is this MAC connected to */
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  unsigned dma;
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        unsigned tx_channel;
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        unsigned rx_channel;
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134 702 ivang
  /* Our address */
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  unsigned char mac_address[ETHER_ADDR_LEN];
136 702 ivang
 
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  /* interrupt line */
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  unsigned long mac_int;
139 346 erez
 
140 889 ivang
  /* VAPI ID */
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  unsigned long base_vapi_id;
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143 346 erez
  /* RX and TX file names and handles */
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  const char *rxfile, *txfile;
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        int txfd;
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        int rxfd;
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        off_t loopback_offset;
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149 702 ivang
    int rtx_sock;
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    int rtx_type;
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    struct ifreq ifr;
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    fd_set rfds, wfds;
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154 346 erez
        /* Current TX state */
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        struct
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        {
157 695 ivang
            unsigned long state;
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            unsigned long bd_index;
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            unsigned long bd;
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            unsigned long bd_addr;
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            unsigned working, waiting_for_dma, error;
162 702 ivang
            long packet_length;
163 695 ivang
            unsigned minimum_length, maximum_length;
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            unsigned add_crc;
165 702 ivang
            unsigned crc_dly;
166 695 ivang
            unsigned long crc_value;
167 702 ivang
            long bytes_left, bytes_sent;
168 346 erez
        } tx;
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        /* Current RX state */
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        struct
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        {
173 695 ivang
            unsigned long state;
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            unsigned long bd_index;
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            unsigned long bd;
176 702 ivang
            unsigned long bd_addr;
177 695 ivang
            int fd;
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            off_t *offset;
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            unsigned working, error, waiting_for_dma;
180 702 ivang
            long packet_length, bytes_read, bytes_left;
181 346 erez
        } rx;
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  /* Visible registers */
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  struct
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  {
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    unsigned long moder;
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    unsigned long int_source;
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    unsigned long int_mask;
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    unsigned long ipgt;
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    unsigned long ipgr1;
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    unsigned long ipgr2;
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    unsigned long packetlen;
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    unsigned long collconf;
194 418 erez
    unsigned long tx_bd_num;
195 346 erez
    unsigned long controlmoder;
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    unsigned long miimoder;
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    unsigned long miicommand;
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    unsigned long miiaddress;
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    unsigned long miitx_data;
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    unsigned long miirx_data;
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    unsigned long miistatus;
202 744 simons
    unsigned long hash0;
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    unsigned long hash1;
204 346 erez
 
205 695 ivang
    /* Buffer descriptors */
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    unsigned long bd_ram[ETH_BD_SPACE / 4];
207 346 erez
  } regs;
208 695 ivang
 
209 702 ivang
    unsigned char rx_buff[ETH_MAXPL];
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    unsigned char tx_buff[ETH_MAXPL];
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    unsigned char lo_buff[ETH_MAXPL];
212 346 erez
};
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#endif /* __OR1KSIM_PERIPHERAL_ETHERNET_I_H */

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